Method and circuit arrangement for transmitting data blocks thro

Details Method and circuit arrangement for transmitting data blocks thro Method and circuit arrangement for transmitting data blocks thro

1992-10-29

1994-09-20

Wambach, Margaret Rose

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Counter controlled counter

377 55, 377 56, 36518903, 365191, 365236, 36523008, H03K 2102

Patent

active

053496213

ABSTRACT:
In the transmission of variable length data blocks, where data and addresses share the same bus lines, one of the other signals, which are present anyway (chip-select, CS-, read, write), indicates the block length. The first time slot following the setting of this signal is designated for an address (starting address), all subsequent time slots are designated for data, until the signal is reset. In this way, the length of the data block need not be known at the beginning of the transfer.

REFERENCES:
patent: 5166903 (1992-11-01), Aichelmann, Jr.

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