Method and circuit arrangement for synchronizing plural...

Details Method and circuit arrangement for synchronizing plural... Method and circuit arrangement for synchronizing plural...

2006-09-19

2006-09-19

Mis, David (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Plural oscillators controlled

C331S025000, C455S260000

Reexamination Certificate

active

07109803

ABSTRACT:
A circuit arrangement includes a first phase locked loop to generate a first oscillator frequency, a second phase locked loop to generate a second oscillator frequency, a reference frequency emitter connected to a reference frequency input of both phase locked loops, and a signal attenuator and optionally a switch connected between a master signal output of the first (master) loop and an input of the second (slave) loop. In a method, a common reference frequency is provided to both loops, the first loop generates a first oscillator frequency, and the second loop generates a second oscillator frequency that matches the first oscillator frequency in at least one operating mode and optionally differs from the first oscillator frequency in another operating mode. The frequency matching in one of the modes involves feeding an attenuated signal from the first loop operating as a master into the second loop operating as a slave.

REFERENCES:
patent: 5717730 (1998-02-01), Prakash et al.
patent: 6281727 (2001-08-01), Hattori
patent: 22 40 729 (1974-02-01), None
patent: 37 20 682 (1989-01-01), None
patent: 42 36 621 (1994-05-01), None

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