Method and circuit arrangement for switching a clock-controlled

Details Method and circuit arrangement for switching a clock-controlled Method and circuit arrangement for switching a clock-controlled

1985-12-16

1988-05-31

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328 55, 328154, 307480, H03K 526, H03L 700

Patent

active

047484179

ABSTRACT:
At least two operating statuses selected by a selection signal are respectively controlled by connecting an individual clock signal sequence. A change of the selection signal initially remains ineffective until the next clock edge of a defined direction has appeared in the previously selected clock signal sequence. The clock signal status which has thus appeared is maintained until the next clock edge of the same direction has appeared in the clock signal sequence allocated to the operating status to be activated. This clock signal sequence is now connected through to the clock-controlled device. This type of delayed switching results in complete clock periods in the connected through clock signal, even given changes in the selection signal which occur asynchronously thereto.

REFERENCES:
patent: 3539933 (1970-11-01), White
patent: 3932816 (1976-01-01), MacGregor
patent: 4156200 (1979-05-01), Gomez
patent: 4229699 (1980-10-01), Frissell
patent: 4398155 (1983-08-01), Howell, Jr. et al.
patent: 4919629 (1983-12-01), O'Brien

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