Method and circuit arrangement for sequencing microinstruction s

Details Method and circuit arrangement for sequencing microinstruction s Method and circuit arrangement for sequencing microinstruction s

1977-04-18

1979-05-29

Nusbaum, Mark E.

Boots, shoes, and leggings

G06F 912, G06F 918, G06F 920

Patent

active

041569008

ABSTRACT:
A circuit for sequencing microinstruction sequences in data processing equipment in which during the course of a primary sequence subroutine jumps are performed and subsequences are carried out and at the end of each, a return jump into the primary sequence takes place due to the control provided by a temporarily stored return jump address at a point in the sequence at which a two-part branching instruction is to be evaluated. The first part of the branching instruction characterizes a branching function which is to be carried out dependent on a decision which is specified in the second part thereof. The circuit includes a microinstruction storage from which microinstruction sequences are taken over depending upon the output signals from a central fixed-cycle control circuit fed into a microinstruction register and a recoder which is arranged thereafter. The central fixed-cycle control circuit feeds into the microinstruction register, through a control signal which characterizes a return jump, a first output signal for maintaining the return jump instruction stored in the microinstruction register and a second output signal for the additional taking over of the branching instruction which is controlled by the return jump address which is transmitted into a microinstruction address register.

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Koltschak et al., "Regeneration of Subroutine Start Address," IBM Technical Disclosure Bulletin, vol. 14, No. 12, May, 1972.

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