Electrical transmission or interconnection systems – Plural supply circuits or sources – Connecting or disconnecting
Reexamination Certificate
2007-10-16
2007-10-16
Deberadinis, Robert L. (Department: 2836)
Electrical transmission or interconnection systems
Plural supply circuits or sources
Connecting or disconnecting
Reexamination Certificate
active
10912678
ABSTRACT:
The method and circuit arrangement both minimize stray electromagnetic interference in an electronic circuit, in which symmetric measurement signals are evaluated. Both inputs (InP, InM) of an evaluation circuit (2) are provided with a bank of switchable capacitors (Cz) individually or in groups, which are connectable with the respective inputs. A predetermined interference signal is applied to the respective inputs (InP, InM) and individual ones or groups of the switchable capacitors (Cz) are selectively connected with the inputs (InP, InM) so that a maximum suppression of the predetermined interference signal can take place. Data regarding the capacitance values selected during the suppression of the predetermined interference signal is stored in the memory (3′) of a switching controller (3) during selective switching so that the same adjustment occurs automatically during subsequent operation cycles of the circuit arrangement.
REFERENCES:
patent: 4989002 (1991-01-01), Tan
patent: 6131453 (2000-10-01), Sultan et al.
patent: 6754876 (2004-06-01), Sasaki et al.
patent: 31 34 322 (1983-03-01), None
patent: 44 25 164 (1996-01-01), None
patent: 195 31 386 (1997-02-01), None
patent: 196 03 674 (1997-08-01), None
Deberadinis Robert L.
Robert & Bosch GmbH
Striker Michael J.
LandOfFree
Method and circuit arrangement for minimizing interference... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and circuit arrangement for minimizing interference..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and circuit arrangement for minimizing interference... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3897266