Pulse or digital communications – Receivers – Particular pulse demodulator or detector
Reexamination Certificate
1998-07-01
2001-09-11
Bocure, Tesfaldet (Department: 2631)
Pulse or digital communications
Receivers
Particular pulse demodulator or detector
Reexamination Certificate
active
06289058
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method and circuit arrangement for detecting short pulses of a digital input signal by using an evaluation circuit, whose time intervals for polling the input signal are long compared to the duration of the pulses.
BACKGROUND INFORMATION
The problem sometimes arises that sporadically occurring pulses need to be detected, whose amplitude, frequency and, in some instances, duration provide useful information. An example of this is a multi-path detection circuit, as used in radios, which supplies irregularly occurring needle pulses, whose amplitude, duration, and frequency serve as an index for the magnitude of the interference resulting from the reception of direct and reflected transmission signals. The situation is similar for a detection circuit used for interferences from an adjacent channel (side-to-side crosstalk). The pulses of interest occur regularly as pulse-shaped breaks in the useful signal level. Thus, the pulses of interest are evaluated as negative pulses, but they can also be evaluated as positive pulses. These pulses are analyzed as measured variables using a microprocessor, which, because of its other tasks, is not able to poll the relevant input signal much more frequently than, for instance, every 10 ms. Therefore, it does not make sense to read the instantaneous values of the input signal into the microprocessor. Because of the short duration of the pulses, even a mean value generation, which would be easier to implement using digital signals, does not provide useful information.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method and a circuit arrangement that use digital processing to detect and analyze the short-term pulses of an input digital signal. This detection and evaluation performed by the present invention is carried out with the aid of an evaluation circuit that can capture the input signal at considerably shorter sampling frequencies than would be required under the sampling theorem.
The present invention achieves this object using a method of the type mentioned above, characterized by the formation of a difference between the input signal and an output signal formed from the input signal. When the difference has a first operational sign, the change in the input signal is effected proportionally to the difference with a large proportionality factor. When the difference has another operational sign, the change in the input signal is effected proportionally to the difference with a small proportionality factor.
With the method of the present invention, therefore, an output signal is formed that, because of the short input pulses, can change quickly, thus following quickly on the input pulses tendentially, but that changes only slowly when the input signal has no pulses, so that the drop in the output signal to the level of “no pulses,” which, for instance, can be a noise level, occurs relatively slowly. In this manner, the output signal formed is influenced by the amplitude of the pulses, the frequency of occurrence of the pulses, and their duration, so that the microprocessor polling the output signal at relatively long intervals of time queries a signal level that stands in good relation to the frequency, duration, and magnitude of the pulses. As a consequence, for instance, a useful indication about the quality of a received signal in a radio is provided.
In a very simple and preferred specific embodiment of the method, the difference formed is multiplied in a first branch by a first multiplication factor (a) and, in a parallel second branch after its absolute value is formed, is multiplied by a second multiplication factor (b); thereafter, the output signals of both branches are added together, producing, in a simple manner, the proportionality factor (a + b) for a positive difference and the proportionality factor (a - b) for a negative difference.
A realization of the method described in the present invention in a microprocessor, for the subsequent processing of the signal prepared in the manner described in the present invention, for instance, for the purpose of forming a still larger time constant, can be effected in a simple manner. In particular, in the microprocessor, the difference between the input signal and the output signal is formed and the microprocessor determines whether the difference is positive or negative. If the difference, for instance, is positive, the difference formed is shifted in the working memory by a first increment n
1
spaces to the right, corresponding to an evaluation of the difference with a multiplication factor 1/2
n1
. If the difference is negative, there occurs a shift by an increment n
2
spaces (n
2
>n
1
), producing different valuation with 1/2
n2
, so that, in this simple manner, two different evaluation factors for the difference are created. The difference evaluated in this manner is then added to or subtracted from the previously existing output signal in order to reduce the difference between the input signal and the output signal.
To implement the method described in the present invention, a circuit arrangement is provided with an input connection for an input signal and an output connection for an output signal. The circuit arrangement includes a subtraction stage, which is able to be supplied with the input signal and the output signal, delayed by one time pulse, a discriminator relating to the different operational signs of the difference, and a multiplication stage for the formation of different proportionality factors. These different proportionality factors are formed as a function of the operational sign of the difference in order to change the output signal proportionally to the difference.
According to a variant of the circuit arrangement of the present invention, a first branch having a first multiplication stage having a factor (a) is linked to the subtraction stage, and a second branch is connected in parallel to the first branch; the second branch has an absolute-value generator and a second multiplication stage having a factor (b), a first addition stage, to whose inputs the outputs of the two branches are connected, and a second addition stage, to which the output signal, delayed by one time pulse, and the output signal of the first addition stage can be routed.
The preferred use of the circuit arrangement of the present invention and the preferred application of the method of the present invention lie in the detection of the reception quality of a radio receiver, in which certain interferences produce irregularly occurring needle pulses.
REFERENCES:
patent: 3972000 (1976-07-01), Desblache et al.
patent: 4652775 (1987-03-01), Daudelin
patent: 5390030 (1995-02-01), Kudose
patent: 5940136 (1999-08-01), Abe et al.
patent: 0 465 334 (1992-01-01), None
Bocure Tesfaldet
Kenyon & Kenyon
Robert & Bosch GmbH
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