Method and arrangement for temperature calibration

Details Method and arrangement for temperature calibration Method and arrangement for temperature calibration

2004-06-22

2009-06-23

Feliciano, Eliseo Ramos (Department: 2857)

Data processing: measuring, calibrating, or testing

Calibration or correction system

Temperature

C702S130000, C702S182000, C702S183000, C324S765010, C374S172000

Reexamination Certificate

active

07552022

ABSTRACT:
The invention concerns an arrangement on a semiconductor chip for calibrating temperature setting curve having a signal generation unit (2) for providing a first signal (Iptat1, Vptat1, fptat1), which is proportional to the actual uncalibrated temperature T1of the chip. To avoid bringing the chip on a second temperature it is proposed to read a first signal (Iptat1, Vptat1, fptat1), which is proportional to the actual uncalibrated temperature T1of the chip and generate a signal offset (Ivirt, Vvirt, fvirt), which is combined with the first signal (Iptat1, Vptat1, fptat1) defining a second signal (Iptat2, Vptat2, fptat2) and to extract a first actual temperature T1from the first signal (Iptat1, Vptat1, fptat1) and a second uncalibrated temperature T2from the second signal (Iptat2, Vptat2, fptat2).

REFERENCES:
patent: 6183131 (2001-02-01), Holloway et al.

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