Wave transmission lines and networks – Negative resistance or reactance networks of the active type – Simulating specific type of reactance
Reexamination Certificate
1999-05-14
2001-11-13
Pascal, Robert (Department: 2817)
Wave transmission lines and networks
Negative resistance or reactance networks of the active type
Simulating specific type of reactance
C333S167000, C333S168000
Reexamination Certificate
active
06317016
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to filters of the type involving transconductance amplifier stages that employ field effect transistors and, more particularly, to the implementation of inductor-simulating gyrator-type filters in a manner that significantly reduces power consumption.
BACKGROUND OF THE INVENTION
The communications industry continues to rely upon advances in semiconductor technology to realize higher-functioning devices serving an increasingly complex communication spectrum. For many applications, realizing higher-functioning devices requires the transmission and reception of signals in potentially noisy environments. At the reception end of such communication, recovering the transmitted signal with a high degree of integrity typically requires filtering the analog signal. Preferably, this filtering occurs before significant amplification of the received signal.
Due to its low sensitivity to noise, signal filtering is often achieved using passive filters based on an LC (inductance/capacitance) ladder approach. Designing this type of passive filter, however, is problematic due to an incompatibility of integrating inductors with conventional circuit integration structures and processes. To overcome this dilemma, the conventional inductor has been replaced in many applications with an inductor-simulating electronic component called a gyrator. Gyrators are typically constructed using transistors and capacitors, each of which is fully compatible with conventional circuit integration structures and processes,
In many applications, these signal filters are also required to manifest a linear response within the bandwidth, a precisely-defined stopband rejection, and, in some instances, programmability (tunability) within the bandwidth. In defining filter performance, each of these important aspects has been partially realized using Operational Transconductance Amplifiers (OTAs). OTAs are typically implemented using the gyrator design in a differential amplifier configuration. The programmability of the OTA is addressed by varying its transconductance, which is directly proportional to the bandwidth characteristics and inversely proportional to the capacitance.
For many filters requiring or benefiting from gyrators of this differential-transconductance type, precisely controlling the common mode voltage of the transconductance stages is important. This is particularly true for certain channel select filters such as the channel filter recommended in CDMA IS95, where filter performance should comply with stringent filter linearity and stopband rejection criteria. Gyrators of this differential amplifier type provide a somewhat balanced output having a common mode voltage (or difference potential) that is a function of potentials of nodes in the vicinity of the output nodes. However, because these potentials are difficult to control, an intolerable variation of the common mode voltage can result, which in turn leads to variation in conductance value and thus variation of the cutoff frequencies. Moreover, to satisfy stringent filter linearity criteria, it is important that the operating frequency range be widely defined and not fluctuate.
These difficulties in such differential amplifier gyrator circuits have been partly overcome by common mode feedback (CMFB) implemented as part of gyrator circuits to maintain the common mode voltage within a reasonable range. In one implementation, for example, relatively balanced outputs are provided by merging the CMFB and the differential gain paths to improve accuracy in the balancing of the output. The above-referenced patent document provides further information on this type of circuit as well as related implementations.
Another significant concern in attempting to realize an effectively-performing filter in an integrated-circuit package is excessive power consumption. Although active RC (resistor-capacitor) filters can be readily implemented to achieve dynamic range scaling with low power consumption and low noise performance, unlike differential amplifier gyrator circuits, RC filters are sensitive to process variation and therefore not typically suitable for production using conventional MOS-based processing techniques.
Differential amplifier gyrator circuits that simulate LC ladder circuits are more advantageous because they realize excellent sensitivity performance and, as addressed above, can be readily implemented for production using conventional MOS-based processing techniques. For many applications, however, power consumed by differential amplifier gyrator circuits is excessive. Among others, these applications include handheld devices such as those to be used for communication in compliance with CDMA IS95.
Accordingly, for many filter applications, there are opposing tensions in the goals of realizing IC-compatibility and excellent sensitivity performance and the goal of signal-filtering without excessive power consumption. The present invention addresses implementations and methods for realizing signal-filtering by way of differential amplifier gyration without excessive power consumption, for CDMA IS95 type communication and other applications that require and benefit from IC-compatible signal-filtering with excellent sensitivity performance and low power consumption.
SUMMARY
According to various aspects of the present invention, embodiments thereof are exemplified in the form of methods and arrangements for reducing power consumption in gyrator-type signal filtering involving differential amplifying-type filters. Such embodiments are useful in connection with integration of such filters as part of IC applications.
One specific implementation is directed to a signal-filtering circuit arrangement, comprising an arrangement of differential amplifying-type gyrators simulating LC ladder sections with the first of the LC ladder sections simulated to provide a gain of two to significantly reduce noise contributions in the subsequent ladder sections and thereby reduce overall power consumption.
In another example implementation, the present invention is directed to a gyrator-type signal-filtering circuit arrangement, comprising a plurality of transconductance cells arranged to simulate at least a first inductance ladder section and a second inductance ladder section. The first inductance ladder section is adapted to provide a gain of at least two, and each of the first and second inductance ladder sections has at least one associated capacitance value scaled to accommodate a feed-forward and feedback path. Further, each of the first and second inductance ladder sections has at least one associated transconductance value scaled to accommodate the impedance level and signal amplitude of the circuit arrangement.
Another specific example implementation is directed to a signal-filtering circuit arrangement that uses a gyrator-type signal-filtering circuit to simulate a multiple-section LC ladder implementation. A plurality of transconductance cells are arranged to simulate the first inductance ladder section and at least one subsequent inductance ladder section. The first inductance ladder section is adapted to provide a gain of two or three. By setting the gain of the first section in this manner, the noise contribution of the subsequent sections is significantly lessened relative to the conventional implementation in which the gain of the first section is unity. Further, each of the first and subsequent inductance ladder sections has at least one associated capacitance value scaled to accommodate a feed-forward and feedback path through transconductance cells, and each has at least one associated transconductance value scaled to accommodate impedance level and signal amplitude of the circuit arrangement. The present invention is especially advantageous for low-power IC applications.
Another aspect of the present invention modifies the above arrangement by sharing common mode feedback between transconductance cells with shared outputs and is especially advantageous for low-power IC applications, such as
Glenn Kimberly E
Koninklijke Philips Electronics
Pascal Robert
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