Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
1998-07-10
2001-02-06
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S143000
Reexamination Certificate
active
06184814
ABSTRACT:
TECHNICAL FIELD
The invention relates to a device and a method for generating a time mean value-free binary signal from an input signal.
STATE OF THE ART
The object of a limiter is to divide the continuous voltage area of an analog input signal into two regions and to generate a digital output signal indicating in which of these two regions the analog signal is located. The digital output signal must per definition have an extremely short transition time. Thus, a limiter can alternatively be regarded as a bold amplifier, since a slowly varying input signal results in an output signal with very fast switching.
By digital signal in this context is meant a signal, which substantially only can have one of two binary signal levels and where the switching time between these two levels is negligible. Thus, the input signal being analogue means that the input signal does not fulfil the two above mentioned criterias. Nevertheless, the information which the signal contains can very well be of digital type. For example, the analog input signal can be a data signal in a receiver based on a transmitted digital signal which at the transfer has been distorted and/or superimposed with noise. By suitable limitation of the data signal, an estimation of the transmitted signal is obtained. However, herein it is important that the division line between said two regions mentioned above is on the right level for correct supply of high or low level to the digital output signal.
Transmitted data signals are normally so coded that the signal reaches a high level during substantially 50% of the time. Such signals that fulfil this criterion can be said to be time mean value free. The mean value freedom of an analog signal is normally defined by the direct voltage component being zero, which means that the area above the zero line is equal to the area below thereof. The mean value freedom of a binary signal can be defined in different ways. However, in the following a binary signal is time mean value-free when the DC component of the binary signal is between the two signal levels which the binary signal can have.
Another example of situations where a time mean value-free binary signal is aimed at is when, starting from a repetitive signal one wishes to generate a clock signal, for instance for synchronization purposes, where the clock signal shall show a pulse ratio of 50% and have the same frequency as the repetitive signal.
Such a binarization of an analog signal is often used in a totally digital environment. A circuit for generation of a time mean value-free binary clock signal from an analog input signal can often be the only circuit of analog type in an application having mostly digital character. Consequently, it would be desirable to be able to realize this analog circuit in the same digital process. The possibility of employing MOS field effect transistors for realization of resistors and capacitors and be able to produce a circuit of analog type in a digital CMOS process is already well known. One problem herein is that the resistors and capacitors thereby obtained hardly can obtain any higher precision in their component values. Furthermore, it is problematical to realize analog components with sufficient linearity. Capacitors and high-resistive resistors, linear over a greater voltage range, can hardly be obtained with this technology. For CMOS-circuits, capacitors with higher linearity are achieved by using two polysilicon layers for the capacitor plates consisting of the input capacitance of the transistor at the gate. However, standard-CMOS-processors employed in integrated digital circuits do not use such polysilicon layers. An alternative method for obtaining capacitors with higher linearity is to use polysilicon/metal or metal/metal capacitors. However, since the distance between a polysilicon layer and a metal layer or a metal layer and another metal layer is much higher than between two polysilicon layers, the area of these capacitors is often ten times larger.
U.S. Pat. No. 4,963,872 presents a binarizing circuit for generation of a mean value-free binary signal employing a feedback, wherein the binarized signal is compared to a time mean value-free binary reference signal generated by means of a frequency divider, said reference signal having the same signal levels as the binarized signal. The reference signal is low pass filtered so powerfully that the signal after the filtration is considered to correspond to the mean value of the reference signal, whereafter said filtered signal is subtracted from the binarized signal. The signal thereby obtained is integrated with an analog integrator and fed back to the input of the circuit, where it is subtracted from the analog input signal. The binarized signal is then obtained by the result being compared to a fast threshold value, in such a way that the binarized signal reaches a high level if the corrected input signal exceeds the threshold value, and a low level if it is below the threshold value. Hereby, the feedback loop will be adjusted in such a way that the mean value of the binarized signal reaches the same value as the reference signal. Since the reference signal is time mean value-free, the binarized signal will consequently also be almost time mean value-free.
However, the disclosed circuit requires linear components. Non-linear components cause deviations from the theoretical result so that a remaining error in the binarized output signal will be obtained. Therefore, the circuit is hard to implement in a digital CMOS technology.
SUMMARY OF THE INVENTION
When binarizing an incoming analog signal it is, as mentioned above, desirable to be able to obtain a time mean value-free binary signal without requiring absolute linearity of the components comprised in the circuit. The object of the present invention is to solve the above mentioned problem.
The problem is solved by generating a binary signal in a feedback loop from an input signal. This signal, which can also be the output signal of the circuit, is lowpass-filtered with a first filter, whereafter it is compared to a time mean value-free reference signal while forming a difference signal, which reference signal is lowpass-filtered with a second filter. The difference signal thereby obtained is fed back to the input of the circuit. The first and the second filter are substantially identical as regards possible non-linearities in the characteristic of the filters. Hereby, possible deviations from time mean value-freedom in the time mean value of the generated binary signal are minimized.
The generated binary signal, being the output signal of the circuit, is advantageously generated by means of a limiter which binarizes the input signal. For generation of a square wave-shaped clock signal alternatively a pulse generator triggered by the input signal can be employed.
By comparing the mean value of the output signal to a mean value of a time mean value-free reference signal, a measure of the deviation of the output signal from time mean value-freedom can be obtained. By feedback of this deviation, a feedback loop is obtained striving to be adjusted so that the difference between the mean value of the output signal and the mean value of the reference signal is minimized.
According to the present invention the comparison between the mean value of the output signal and the time mean value-free reference signal is realized by the output signal being filtered through a first lowpass filter with a low cut-off frequency compared to the input signal. Hereby, a first filtered signal is obtained. Due to non-linearity in the filter used, the mean value of the signal can differ from the mean value of the output signal. By generating a time mean value-free signal and filtering the signal through a second lowpass filter, which with respect to non-linearities is substantially identical to the first lowpass filter, a second filtered signal is obtained of which the mean value due to non-linearities does not differ from the mean value of the reference signal. The direct current level of the second
Jenkens & Gilchrist P.C.
Telefonaktiebolaget L M Ericsson (publ)
Wamsley Patrick
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