Method and arrangement for generating a mean-value-free binary s

Coded data generation or conversion – Analog to or from digital conversion – Converter is part of control loop

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341143, 341118, H03M 106

Patent

active

049638726

ABSTRACT:
An arrangement for generating mean-value-free binary signals includes a binarizing circuit which receives an analog signal to be binarized and binarizes said signal with respect to a binarizing threshold. Connected to the output of the binarizing circuit is a closed-loop control circuit which includes a differential integrator which receives at the one input the binary signal from the output of the binarizing circuit. Applied to the second input of the differential integrator is a desired value signal which corresponds to the mean value between the two signal levels of the binary signal. The differential integrator integrates the deviation between the binary signal and the desired value signal and furnishes a signal corresponding to the integrated deviation. By the signal corresponding to the integrated deviation the position of the analog signal relatively to the binarizing threshold is shifted in a sense such that the mean value of the deviation is regulated to zero. For this purpose either the signal corresponding to the integrated deviation can be superimposed on the analog signal prior to the binarizing or the binarizing threshold can be varied by the signal corresponding to the integrated deviation. Preferably, the desired value signal is produced by integration of a mean-value-free binary signal.

REFERENCES:
patent: 4109211 (1978-08-01), Mese et al.
patent: 4263555 (1981-04-01), Hunka
patent: 4499570 (1985-02-01), Schouhamer Immink et al.
patent: 4540897 (1985-09-01), Takaoka et al.
patent: 4622586 (1986-11-01), Megeid
patent: 4724419 (1988-02-01), Kreuzer

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