Method and arrangement for determining phase changes of a refere

Oscillators – Automatic frequency stabilization using a phase or frequency... – Particular error voltage control

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331 14, 331 18, 331 49, 327156, 327292, 364481, 364484, H03L 706, H03L 708, G01R 2300, G06F 1700

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055963005

ABSTRACT:
A processor (PR) is connected to the output of a phase comparator (PK) in a phase-locked loop. The processor (PR) calculates the phase shift of an input signal (f.sub.E) within an observation time span (for example, .DELTA.t=0-T) from the phase difference (.DELTA..phi.) at the output of the phase comparator (PK) and the parameters of the phase-locked loop (FT1, PK, FI, VCO, FT2).

REFERENCES:
patent: 5260979 (1993-11-01), Parker et al.
Telcom Report 9 (1986) vol. 4, "Neue Taktgeneratoren fur EWSD", pp. 263-269. Ernst, W. et al.

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