Electrical computers and digital processing systems: multicomput – Master/slave computer controlling
Patent
1998-01-12
2000-02-29
An, Meng-Ai T.
Electrical computers and digital processing systems: multicomput
Master/slave computer controlling
709200, 709209, 709227, 709232, 709245, 710 4, 710 11, 710 14, 710 20, 710 21, 710 33, 710110, 710129, 710131, G06F 1300
Patent
active
060321784
ABSTRACT:
The invention relates to a method and an arrangement for operating a bus system having at least one master unit and at least one slave unit, having a bus and a bus control unit for the bus arbitration and for controlling the data transfer. The data transmission is split into a request data transfer and a response data transfer, and, in the time between the request data transfer and the response data transfer, the bus is cleared for the data transmissions of other master units in a first data transmission configuration, or the bus is blocked between the request data transfer and the response data transfer, in a second data transmission configuration and slave units. In the case of a response transfer, the master and slave are changed round.
REFERENCES:
patent: 5828852 (1998-10-01), Niedermeier et al.
Bacigalupo Tommaso
Erdmann Michael
Rohm Peter
An Meng-Ai T.
El-Hady Nabil
Greenberg Laurence A.
Lerner Herbert L.
Siemens Aktiengesellschaft
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