Method and arrangement for clock adjustment using programmable p

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G06F 108

Patent

active

055881459

ABSTRACT:
A method and arrangement for adjusting a clock frequency to allow computer devices with different clock frequencies to operate together. The arrangement scales the input clock frequency to be scaled by any desired fraction by controlling both the numerator and denominator of the scaling fraction. Clock frequency adjustment is achieved by transforming the input clock frequency into a periodic clock frequency that is reset following a desired clock period and scaling this periodic clock frequency according to a desired divisor value to generate the desired clock frequency.

REFERENCES:
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patent: 3739156 (1973-06-01), Gebelein, Jr. et al.
patent: 4819164 (1989-04-01), Branson
patent: 5410683 (1995-04-01), Al-khairi
patent: 5414391 (1995-05-01), Hori
patent: 5479644 (1995-12-01), Hongo
patent: 5506982 (1996-04-01), Hotta et al.

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