Method and arrangement for adapting a clock to a plesiochronous

Details Method and arrangement for adapting a clock to a plesiochronous Method and arrangement for adapting a clock to a plesiochronous

1989-12-01

1991-09-03

Safourek, Benedict V.

Pulse or digital communications

Spread spectrum

Direct sequence

328155, H03D 0324

Patent

active

050460757

ABSTRACT:
A method and an apparatus for adapting a locally-generated clock having an arbitrary phase relation to a plesiochronous data signal in which further clocks are derived from the clock via a delay line chain in such a fashion that a clock sequence having identical phase spacings is produced. These clocks are clocked by the data signal in edge-triggered D-flip-flops. The difference between the logical states of the Q outputs of two neighboring D-flip-flops provides a preselection of the best-adapted clock. Proceeding from the Q outputs and Q outputs of the D-flip-flops and the non-inverting and inverting outputs of a plurality of amplifiers, a gate arrangement connects an optimally-adapted clock to a clock output. A data signal is delayed in a delay unit by the time that the selection of the optimally-adapted clock requires. This then clocks the delayed data signal in an edge-triggered D-flip-flop.

REFERENCES:
patent: 4780889 (1988-10-01), Ley et al.
patent: 4955040 (1990-09-01), Sarkoezi
patent: 4959846 (1990-09-01), Apple et al.

Affiliated with

Also associated with

Rating

Method and arrangement for adapting a clock to a plesiochronous does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and arrangement for adapting a clock to a plesiochronous , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and arrangement for adapting a clock to a plesiochronous will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1014782