Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Generating sawtooth or triangular output
Utility Patent
1999-08-02
2001-01-02
Wells, Kenneth B. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Generating sawtooth or triangular output
C327S137000
Utility Patent
active
06169433
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to circuitry for generating ramped voltages having controlled maximum amplitude, and to ramped voltage generation methods performed by such circuitry. Preferred embodiments of the invention are circuits for generating ramped voltage signals (e.g., for use in DC to DC converters) having controlled maximum amplitude.
2. Description of the Related Art
In power supply circuitry, it is often desired to produce ramped voltages. For example, in some DC-DC converters (sometimes referred to as interleaved PWM DC/DC converters, where “PWM” denotes “pulse width modulated”), multiple channels of ramped voltages are provided to comparator circuitry for use in controlling the duty cycle of the DC—DC converter and thus the amplitude of the DC output voltage. The waveforms of the ramped voltages are identical (to the extent possible and practical) except that each has a different phase than the others. An advantage of providing multiple channels of ramped voltages of this type (rather than a single ramped voltage) is that use of multiple channels of PATENT ramped voltages allows the DC/DC converter with parallel power-processing channels to be implemented with smaller power stage inductors, smaller input filter inductors, and smaller output capacitors, thus providing an overall improved step-load transient response and reduced physical size.
More generally, circuitry providing ramped voltage signals (with controlled maximum amplitude) is useful for a wide variety of applications, including but not limited to interleaved PWM DC/DC converter applications. However, when implementing circuitry providing ramped voltage signals with controlled maximum amplitude (especially when implementing it as an integrated circuit or part of an integrated circuit), process and temperature variations typically cause variation from circuit to circuit (or variation over time in a single circuit) in the characteristics (e.g., maximum amplitude) of the ramped voltages.
SUMMARY OF THE INVENTION
In a class of embodiments, the invention is a circuit which employs negative feedback to generate a ramped voltage signal (preferably of a type useful in an interleaved PWM dc/dc converter) having well controlled maximum amplitude. The invention can be implemented as an integrated circuit (or portion of an integrated circuit) which generates a ramped voltage signal with controlled maximum amplitude in a manner independent of process and temperature variations in implementing and operating such integrated circuit. In preferred embodiments, the inventive circuit includes an amplifier (preferably an operational transconductance amplifier) having one input coupled to receive a reference signal indicative of a preselected maximum ramped voltage amplitude, an output coupled to a ramped voltage generation circuit, and another input coupled to the output of the ramped voltage generation circuit. The circuit implements a negative feedback loop in which the amplifier asserts a feedback signal which controls the maximum amplitude of the ramped voltage signal generated by the ramped voltage generation circuity. Preferably, the ramped voltage generation circuit periodically charges and discharges a capacitor to generate the ramped voltage at its output, the amplifier is a transconductance amplifier which is periodically enabled (for a portion of each charging cycle of the capacitor) in response to a clock signal, the invention includes a one-shot circuit which produces a delayed voltage pulse train in response to the clock signal, and the ramped voltage generation circuit receives the delayed voltage pulse train and discharges the capacitor in response to each pulse of the delayed voltage pulse train. The ramped voltage generation circuit is configured to charge or discharge the capacitor by an amount which depends on the feedback signal (which signal is preferably a correction current), and the ramped voltage generation circuit is typically configured to charge the capacitor at a rate which depends on the feedback signal.
The invention can be implemented in a wide variety of applications to generate a ramped voltage signal having well controlled maximum amplitude, for example, in any of a variety of converters having an external clock synchronization input in which it is desirable for an internal voltage ramp (within the converter) to have a maximum amplitude which is independent of frequency.
Another aspect of the invention is a method for generating a ramped voltage signal (preferably of a type useful in an interleaved PWM dc/dc converter) having well controlled maximum amplitude. The method includes the steps of periodically charging and discharging a capacitor to generate the ramped voltage; feeding back the ramped voltage to an amplifier (e.g., an operational transconductance amplifier); periodically enabling the amplifier to generate a correction signal indicative of the difference between the ramped voltage and a reference voltage; and employing the correction signal as negative feedback to control the rate at which the capacitor is charged. Preferably, the amplifier is enabled in response to a clock signal, and the method also includes the steps of generating a delayed voltage pulse train in response to the clock signal, and discharging the capacitor in response to each pulse of the delayed voltage pulse train.
REFERENCES:
patent: 3577007 (1971-05-01), Cross
patent: 4284906 (1981-08-01), Manfredi
patent: 4384305 (1983-05-01), Sonnengerger
patent: 4975820 (1990-12-01), Szepesi
patent: 5253155 (1993-10-01), Yamamoto
patent: 5502410 (1996-03-01), Dunn et al.
patent: 5513094 (1996-04-01), Stanley
patent: 5606296 (1997-02-01), Seong
patent: 5640315 (1997-06-01), Hirano et al.
Dinh Paul
Limbach & Limbach L.L.P.
National Semiconductor Corporation
Wells Kenneth B.
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