Method and apparatus using a memory model

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

703 20, 703 21, 703 24, 703 25, G06F 1750

Patent

active

060539488

ABSTRACT:
A computer system including a memory model of a memory circuit. The computer system comprises a processor coupled to receive and manipulate the memory model, and a memory including the memory model. The memory model includes: a number of address bits corresponding to a number of address bits of the memory circuit; a number of data bits corresponding to a number of data bits of the memory circuit; and a memory type parameter corresponding to a type of the memory circuit.

REFERENCES:
patent: 4130885 (1978-12-01), Dennis
patent: 4315315 (1982-02-01), Kossiakoff
patent: 4455619 (1984-06-01), Masui et al.
patent: 4527249 (1985-07-01), Van Brunt
patent: 4584642 (1986-04-01), Fudanuki
patent: 4587625 (1986-05-01), Marino, Jr. et al.
patent: 4677587 (1987-06-01), Zemany, Jr.
patent: 4695968 (1987-09-01), Sullivan et al.
patent: 4725971 (1988-02-01), Doshi
patent: 4725975 (1988-02-01), Sasaki
patent: 4744084 (1988-05-01), Beck
patent: 4787062 (1988-11-01), Nei et al.
patent: 4827427 (1989-05-01), Hyduke
patent: 4862347 (1989-08-01), Rudy
patent: 4882690 (1989-11-01), Shinsha et al.
patent: 4901260 (1990-02-01), Lubschevsky
patent: 4918594 (1990-04-01), Onizuka
patent: 4922445 (1990-05-01), Mizoue et al.
patent: 4937765 (1990-06-01), Shupe et al.
patent: 5029102 (1991-07-01), Drumm et al.
patent: 5062067 (1991-10-01), Schaefer et al.
patent: 5111413 (1992-05-01), Lazansky et al.
patent: 5151867 (1992-09-01), Hooper et al.
patent: 5175843 (1992-12-01), Casavant et al.
patent: 5198705 (1993-03-01), Galbraith et al.
patent: 5222030 (1993-06-01), Dangelo et al.
patent: 5313615 (1994-05-01), Newman et al.
patent: 5392227 (1995-02-01), Hiserote
patent: 5528752 (1996-06-01), Kise et al.
patent: 5544067 (1996-08-01), Rostoker et al.
patent: 5559718 (1996-09-01), Baisuck et al.
patent: 5819063 (1998-10-01), Dahl et al.
"Addressing the Systems-in-Silicon Verification Challenge," The Siliconization Opportunity, Cadence Design Systems (publication date unknown).
"NC--Verilog Simulator," Cadence Design Systems (publication date unknown).
"SpeedSim, Inc.: SpeedSim/3 Product Background," SpeedSim, Inc., 234 Littleton Road, Suite 2E, Westford, MA 01886 (publication date unknown).
"Voyager CS Mixed-Level VHDL System Verification Environment," IKOS Systems, Inc., 19050 Pruneridge Avenue, Cupertino, CA 95014 (last modified Aug. 29, 1995).
"The SpeedSim/3 Software Simulator: Reducing the Time and Cost of Design Verification," SpeedSim, Inc., 234 Littleton Road, Suite 2E, Westford, MA 01886 (publication date unknown).
"VSC--A Verilog Compiler," Chronologic Simulation, johna@chronologic.com (publication date unknown).
Russel B. Segal, BDSYN: Logic Description Translator BDSIM: Switch-Level Simulator, May 21, 1987, Memorandum No. UCB/ERL M87/33.
D.E. Thomas, The System Architect's Workbench, 1988, 23.2.
Giovanni de Micheli, High-Level Synthesis of Digital Circuits, 1990, 6-7.
R. Camposano, From Behavior to Structure: High-Level Synthesis, 1990, 8-19.
J. Bhasker, An Optimizer for Hardware Synthesis, 1990, 20-36.
Giovanni de Micheli et al., The Olypmus Synthesis System, 1990, 37-53.
Srimat Chakradhar et al., Neural Net and Boolean Satisfiability Models of Logic Circuits, 1990, 54-57.
Mittra, "A Virtual Memory Management Scheme for Simulation Environment," Proceedings of the 1995 IEEE International Verilog HDL Conference, pp. 114-118, Mar. 1995.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and apparatus using a memory model does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus using a memory model, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus using a memory model will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-990186

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.