Method and apparatus to reduce latency in a data network...

Details Method and apparatus to reduce latency in a data network... Method and apparatus to reduce latency in a data network...

2006-06-20

2006-06-20

Ferris, Derrick (Department: 2663)

Multiplex communications

Generalized orthogonal or special mathematical techniques

Particular set of orthogonal functions

C370S338000

Reexamination Certificate

active

07065036

ABSTRACT:
A radio receiver for implementing the physical layer receiving function (PHY) of a wireless data network includes a receive processing pipeline for processing samples of a received packet of data. The samples enter the receive processing pipeline at a first sample rate. A counter generates a running count indicative of the number of samples that have entered the processing pipeline. A comparison unit coupled to the counter determines from the running count if all the samples of the received packet have entered the pipeline. An output of the comparison unit indicates whether or not all samples have entered the pipeline. A clock unit coupled to the comparison unit output provides a clock signal to the pipeline, causing the processing pipeline to process the samples entering the pipeline at a first rate compatible with the first sample rate until the comparison unit output indicates that all samples have entered the pipeline. Thereafter the clock unit causes the processing pipeline to process the samples in the pipeline at a second rate higher than the first rate until the last sample of the packet has been output by the pipeline. The processing latency for processing the complete packet is thus reduced from the case of the processing pipeline processing the samples all at the first data rate.

REFERENCES:
patent: 5537435 (1996-07-01), Carney et al.
patent: 5790615 (1998-08-01), Beale et al.
patent: 6631143 (2003-10-01), Karim

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