Method and apparatus to reduce cavity size and the bondwire leng

Details Method and apparatus to reduce cavity size and the bondwire leng Method and apparatus to reduce cavity size and the bondwire leng

1996-03-28

1998-03-10

Picard, Leo P.

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

361764, 361777, 361783, 361820, 257786, 257691, 257697, 257725, 174 524, 174 521, 174260, H05K 114

Patent

active

057268606

ABSTRACT:
A bus pattern for an integrated circuit package. The package has a first conductive bus and a second conductive bus that are located on a bond shelf. The first conductive bus has a plurality of interconnected tab portions that are separated by a plurality of non-conductive slots. The second conductive bus has a plurality of interconnected tab portions that are located within the non-conductive slots of the first bus. The tab portions of each bus are wire bonded to a plurality of die pads located on an integrated circuit that is mounted to the package.

REFERENCES:
patent: 4513355 (1985-04-01), Shroeder et al.
patent: 5272590 (1993-12-01), Hernandez

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