Pulse or digital communications – Equalizers – Automatic
Reexamination Certificate
2000-03-27
2004-03-09
Chin, Stephen (Department: 2634)
Pulse or digital communications
Equalizers
Automatic
C375S229000, C375S230000, C375S232000, C375S233000
Reexamination Certificate
active
06704355
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to communications systems and methods, and more particularly to data communication systems and methods in which channel impairments are treated.
BACKGROUND OF THE INVENTION
It is well known that a pulse code modulation (PCM) modem can achieve higher speeds of data communication over a switched voice network compared to conventional modems. The basic concept underlying this communication technology is a public switched telephone network (PSTN) having digital links, such as T
1
lines, which can form a basis for a near digital network of 64 kilo-bits-per-second (kb/s) channels. For example, by synchronizing a pulse code modulation (PCM) modem to an 8 kHz sampling rate provided in a central office (CO) and using 8-bit PCM words for data transmission, the modem can theoretically achieve a data rate up to 64 kb/s.
In practice, however, the highest data rate achievable by the PCM modem is about 56 kb/s, due to power constraints and channel impairments, such as echo and intersymbol interference. This rate may be further reduced as the central office periodically “robs” the least significant bit (LSB) of the PCM words and substitutes the robbed bit with a signaling bit, in a known manner. The robbed bit signaling is necessary to indicate call statuses to effect call administration in the PSTN. In robbed bit signaling, the central office (not shown) in the PSTN robs the LSB of a transmitted symbol on each channel once in every six frames.
To reduce echo interference in traditional voice communications, especially far echo interference due to a long-distance feedback of a voice signal through the PSTN, the level of the voice signal from the PSTN is attenuated in a central office switch before it is passed onto an analog loop connected to telephone equipment. Such attenuation by the central office switch is known as a “digital loss.”
While the above-described robbed bit substitution does not cause significant distortion in voice communications, the robbing of bits causes significant degradation in data communications because of the loss of transmitted bits occasioned thereby. Similarly, while the above digital loss helps reduce the far echo interference in voice communications, digital loss causes the levels of transmitted signals representing data to be attenuated, resulting in erroneous data recovery in data communications if the digital loss is not taken into account in the PCM modem. Although the digital loss is built into each central office switch and the underlying attenuation factor is invariant for a given switch, this factor may vary from one switch to another depending on the type and manufacturer of the switch. As a result, a PCM modem that is preadjusted during manufacture thereof to allow for the digital loss by a particular type of switch may not function properly when connected to a different switch in the field.
As apparent from the above-described deficiencies with conventional data systems, a need exists for a data communication system having improved channel equalization and level learning. A further need exists for training the channel equalizer in a data communication system that utilizes the character of the digital network to optimize the performance of the channel equalizer. Yet another need exists for a data communication system that uses a two-level learning approach with fine-tuning to train the channel equalizer and with enhanced timing recovery and performance.
SUMMARY OF THE INVENTION
Generally, a method and apparatus are disclosed for improving channel equalization and enhancing level learning in a data communication system. According to one aspect of the invention, a multi-step equalizer training process is used to train the feed forward filer (FFF) using a two-level equalizer training signal, EQTR(n). The equalizer training process of the present invention separately updates the feed forward filer (FFF) and the level adapter, to gain additional improvements in the training of the feed forward filter (FFF). In addition, the improved training of the channel equalizer provided by the present invention allows a novel level learning process where the feed forward filter (FFF) is fixed.
The multi-step equalizer training process initially trains the feed forward filter (FFF) using a two-level equalizer training signal EQTR(n) having an ideal value (Step One). Step one helps to converge the feed forward filter (FFF) to a certain level. Once the feed forward filter (FFF) reaches a certain level of convergence, the training circuitry is reconfigured during step two for the equalizer training process, to evaluate and update the actual level of the signal EQTR(n), to compensate for the channel. The actual level of the signal EQTR(n) can be different from the ideal signal established during step one because the channel may have a digital loss or a robbed bit condition may have occurred. The level of all six phases is monitored during step two, and the amplitude of each phase if calculated. The determined weighting factors are applied to a low pass filter to reduce the noise and the actual level of the equalizer training signal EQTR(n), B(n), is calculated.
Once the actual level of the signal EQTR(n), B(n), has been calculated during step two of the equalizer training process, the actual level of the signal EQTR(n), B(n), is applied to the level adapter, and the level adapter is no longer updated by reconfiguring the training circuitry to remove the error signal, err(n), inputs to the level adapter. During step three, the feed forward filter (FFF) continues to be updated by the error signal, err(n). Since the level of the signal EQTR(n) is the actual value, B(n), the performance of the feed forward filter (FFF) is improved, even though robbed bit and digital loss degradations have occurred. Thus, step three trains the feed forward filter (FFF) is performed during step three, with the correct level that is disrupted by the robbed bit signaling. Once the equalizer training process is complete, the feed forward filter (FFF) is fixed. Thus, the fine-tuning step (Step
3
) improves the equalizer training and reduces the number of computations that must be performed (MIPS) during the equalizer training process.
According to a second aspect of the invention, the improved training of the feed forward filter (FFF) allows the feed forward filter (FFF) to be fixed during the level learning process. Thus, the level learning process is simplified and can be implemented with fewer MIPS. The improved training of the feed forward filter (FFF) allows the structure of level learning process to be simplified, with the training circuitry removed and the feed forward filter (FFF) fixed, where each level will be divided into six phases and processed individually.
In addition, an input training signal sequence that employs pseudo random, non-zero, signals for each PCM level training is used to enhance the timing recovery and performance of the level learning process. In the past, zero input training signals have been employed in PCM level training. These zero training signals may degrade the timing tone and degrade the accuracy and overall performance of PCM modem communication. In contrast, in this invention, we employ a non-zero, training signal sequence for level training. It is then easy for a designer of ordinary skill in the art to generate a training signal sequence such that it could generate a strong timing tone at
8
kHz to stabilize the timing recovery during level learning. Stability of timing recovery during level learning helps improve the accuracy and overall performance of PCM modem communication.
REFERENCES:
patent: 6002713 (1999-12-01), Goldstein et al.
patent: 6115395 (2000-09-01), Norrell et al.
patent: 6185250 (2001-02-01), Wang et al.
patent: 6404809 (2002-06-01), Zhang
patent: 6459729 (2002-10-01), Lai
Agere Systems INC
Chin Stephen
De La Rosa J.
Odom Curtis
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