Data processing: measuring – calibrating – or testing – Testing system – Of circuit
Reexamination Certificate
1998-02-27
2002-09-03
Assouad, Patrick (Department: 2857)
Data processing: measuring, calibrating, or testing
Testing system
Of circuit
C702S081000, C702S084000, C700S121000
Reexamination Certificate
active
06446021
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to integrated circuit devices. More particularly, the present invention relates to a method and apparatus for monitoring, over a period of time, the quality of integrated circuit devices during manufacture.
BACKGROUND
Integrated circuit chips are manufactured through a complex process involving a great number of operations through which various conductive and insulating materials are layered and etched according to intricate patterns. In conventional processing, integrated circuits are not manufactured individually, but rather an arrangement of a hundred or more chips is manufactured on a semiconductor wafer. The individual chips are then separated once the other processing is complete. Defects can be introduced at any stage in the manufacturing process. A large percentage of defects result from dust or other foreign matter introduced during deposition or printing steps, or from scratches or other imperfections introduced at some point during the process. Errors may also be introduced by deficiencies in the processing from such sources as faulty equipment or faulty process steps.
The number and severity of defects have a direct effect on the yield from any one wafer and from the overall production run. With the demand for integrated circuit chips always increasing, there continues to be a need for maximizing production yield. It is also important to be able to accurately estimate the yield from any one production run in order to accurately gauge wafer starts in order to avoid wasting materials. Both efforts are directed to making the integrated circuit chip manufacturing process as efficient as possible.
Initially wafers were scanned manually to identify and attempt to correct defects. As scanning technology advanced, manufacturers began developing automated methods for evaluating the circuitry constructed in the wafers. Initial efforts were directed toward detecting and classifying defects. For example, in U.S. Pat. No. 5,240,866 Friedman et al. describe a method for distinguishing random defects from defects introduced at one of the process steps. Friedman et al. focuses on grouping defects on a given wafer in an effort to determine whether there is a relationship between defects and process steps. The solution proposed by Friedman et al. presupposes that a grouping (“cluster”) of defects can be used to identify weaknesses in the manufacturing process. Attempts are made to identify patterns by mapping failed circuits for a series of wafers, and then analyzing the result to determine if there is a pattern (“spatial cluster”) indicating a process problem. The process analyzes the results and creates a cluster analysis report or a notification of a match (group of wafers with same process step having the same defect cluster).
In U.S. Pat. No. 5,539,753, Berezin et al. describes a method for sampling and pre-classifying wafer defects in an effort to identify situations where the defect density or number of defects per die exceeds a predefined threshold. Brecher et al., in U.S. Pat. No. 5,544,256, describes a similar attempt to improve defect classification. These and other conventional defect analysis methods are designed to provide a more systematic method of choosing a statistically meaningful group of defects, in an attempt to achieve a more accurate sampling of wafers and make the manual part of inspection more efficient and effective.
Notwithstanding the above, there remains a need for a system to provide various forms of graphic representations of test results of manufacturing process runs which can readily be shared with multiple users of the system.
SUMMARY OF THE INVENTION
The system and method of the present invention provides various forms of graphic representations of test results of manufacturing process runs which can readily be shared with multiple users of the system. One aspect of the invention is a method for reporting a test process of a plurality of cells, wherein the test process is performed in a series of runs. The method includes four steps. First, data regarding the test process for the plurality of cells is gathered. The data is accumulated over the series of runs. Next, the data is characterized to create a set of selected information. The set of selected information includes a subset of the data regarding the test process for the plurality of cells. The method also includes the steps of generating a user-consumable output of the set of selected information, and providing access to the data, the set of selected information, and the user-consumable output. The step of generating a user consumable output includes generating a map or generating a graph.
Another aspect of the present invention is a readable medium having a plurality of modules stored thereon, such as a piece of software. The modules are capable of causing an information handling system, such as a computer network to operate in a particular manner. The plurality of modules include a data gather module, a characterization module, an output module, and a distribution module. The data gather module gathers data regarding at least one test process of a plurality of cells. The characterization module creates a selected set of information including a subset of the data. The output module generates a user-consumable output of the selected set of information. The distribution module provides access to the data, selected set of information, and the user-consumable output to users of the computer network. In another aspect of the invention, the modules are operable with a selected software application such as an Internet browser for providing access to the data, selected set of information, and the user-consumable output.
Still another aspect of the present invention is an information handling system which includes a probe suitable for use with a test process on a plurality of cells, a central processing unit having a memory, and suitable for receiving signals from the probe; and a plurality of modules in an operating environment for use with the central processing unit and operating on the signals. The modules are described above. The central processing unit is connected to a network and is accessible from a number of stations connected to the network. The information handling system also includes at least one of printer or a display for accessing the user-consumable output.
The present invention includes several advantages. Among these advantages include system to provide operators with processing information output in a format that is flexible and which can be easily shared, accessed, and understood. The outputs generated with the present invention include information that tracks both corrections made to the process as well as identifying where the usable chips are found on a wafer. Additionally, the outputs allow a user to track unclassified errors, or a series of process runs.
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Assouad Patrick
Micro)n Technology, Inc.
Schwegman Lundberg Woessner & Kluth P.A.
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