Method and apparatus to disable ISA devices for EISA addresses o

Boots – shoes – and leggings

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395325, 395250, 364DIG1, 364240, 3642408, 3642403, G06F 1300

Patent

active

053177215

ABSTRACT:
A computer system includes a system bus having a plurality of address lines and having a first control line. A connector is coupled to the address lines and the first control line, and can removably receive a circuit card which can accept and/or generate signals on the address lines and first control line. A bus control circuit is coupled to the address lines and to a second control line, and can accept and/or generate signals on the address lines and second control line. A signal blocking circuit is coupled to both of the control lines and to the address lines, responds to the occurrence of a control signal on the second control line by respectively effecting and inhibiting application of the control signal to the first control line when the address on the address lines is respectively within and outside a predetermined group of addresses, and responds to the occurrence of the control signal on the first control line by applying the control signal to the second control line regardless of the address on the address lines.

REFERENCES:
patent: 4829420 (1989-05-01), Stahle
patent: 5043877 (1991-08-01), Berger et al.
patent: 5101492 (1992-03-01), Schultz et al.
patent: 5111423 (1992-05-01), Kopec, Jr. et al.
patent: 5123092 (1992-06-01), Buxton et al.

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