Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2002-12-10
2004-02-24
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S543000, C327S552000, C327S554000, C327S091000, C327S094000, C327S095000
Reexamination Certificate
active
06696884
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to a method and apparatus to eliminate the requirement of a large capacitor to achieve a long time constant in a system. More particularly, the present invention relates to generating long time constant in an integrated circuit where large capacitors are currently unfeasible.
BACKGROUND OF THE INVENTION
Low pass filters are employed in electronic circuit for a variety of reasons. A first order low pass filter is constructed simply of a resistor (R) in series with a capacitor (C) that is coupled to ground. An input signal (VIN) is applied to an input of the resistor, while an output is observed across the capacitor. The values associated with the R and C will determine the frequency and time domain response characteristics of the low pass filter.
The voltage across the capacitor (VC) provides an output signal that can be expressed by the time-domain equation V
C
(t)=V
IN
*(1−e
−t/&tgr;
). At time t=0, voltage V
C
is initially equal to zero, while at time t=∞ voltage V
C
is observed as equal to V
IN
. The term &tgr; is referred to as the time constant for the time domain response. For the first order filter described above, &tgr;=RC. The frequency domain response of the low pass filter is described in terms of the corner frequency (f
c
). The corner frequency corresponds to the −3 dB point in the frequency response of the filter. The corner frequency of a first order RC-type filter is given by 1/(RC) in units of radians/sec, or 1/(2&pgr;RC) in units of Hz. A lower corner frequency (f
c
) is achieved by increasing the product of R and C, yielding a longer time constant.
One common application of a low pass filter is to minimize noise and ripple in a reference voltage. An ideal reference voltage is a purely DC signal. A non-ideal reference voltage is passed through a low pass filter to filter to remove undesirable high frequencies. Power supply noise or ripple is coupled through the capacitor to ground such that the high frequency components are eliminated in the output signal. However, in order to realize a more ideal reference voltage, the corner frequency of the low pass filter must be very low. In other words, the RC time constant associated with the first order low pass filter must be very long to provide a better reference voltage.
SUMMARY OF THE INVENTION
According to one example of the present invention, a switched-capacitor reference voltage circuit includes an offset generator circuit, five switching circuits, two capacitor circuits, and a buffer circuit. The offset generator circuit is configured to receive an input reference voltage from an input node. The offset generator circuit is configured to provide a first reference voltage at a first reference node and a second reference voltage at a second reference node. The first switching circuit is coupled between a first node and a second node, and includes a first control terminal that is configured to receive a first control signal. The second switching circuit is coupled between the second node and a third node, and includes a second control terminal that is configured to receive a second control signal. The third switching circuit is coupled between the input node and the second node, and includes a third control terminal that is configured to receive a third control signal. The fourth switching circuit is coupled between the first reference node and the first node, and includes a fourth control terminal that is configured to receive a fourth control signal. The fifth switching circuit is coupled between the second reference node and the first node, and includes a fifth control terminal that is configured to receive a fifth control signal. The first capacitor circuit is coupled to the second node. The second capacitor circuit is coupled to the third node. The buffer circuit is configured to periodically update a stored voltage at the third node, and arranged to provide a buffered reference signal in response to the stored voltage. The stored voltage corresponds to a filtered version of the input reference voltage.
According to a further feature, the offset generator circuit may be configured such that the first reference voltage is substantially 100 mV above the input reference voltage, and the second reference voltage is substantially 100 mV below the input reference voltage. The offset generator circuit may be further configured such that the first reference voltage and the second reference voltage are compensated for at least one of process and temperature related variations in the voltages. The offset generator circuit may include a unity gain amplifier that is biased such that currents in the unity gain amplifier are proportional to VBG/R, and the unity gain amplifier is configured to provide the first and second reference voltages by driving the proportional current through resistors.
According to another feature, the switching circuits may each include a p-type FET that is configured to operate as a switching circuit, wherein each p-type FET is further arranged to minimize leakage currents.
According to still another feature the capacitor circuits may correspond to n-type FETs that are configured to operate as gate-type capacitors. A first capacitance value that is associated with the first capacitor circuit may be less than a second capacitance value that is associated with the second capacitor circuit. The first and second capacitance circuits may be on-die capacitors.
According to yet another feature, the comparator circuit may be arranged to compare the input reference voltage to the buffered reference signal. The fourth and fifth control signals are responsive to the output of the comparator circuit such that the voltage associated with the second capacitor circuit is increased when the input reference voltage is greater than the buffered reference signal. The voltage associated with the second capacitor circuit is decreased when the input reference voltage is less than the buffered reference signal.
According to still yet another feature, a comparator circuit is arranged to compare the input reference voltage to the buffered reference signal. The fourth and fifth control signals are responsive to the output of the comparator circuit.
According to one example, a divider circuit may be configured to provide the input reference signal as a division of a power-supply voltage. A control logic circuit may be arranged to provide the control signals such that the buffered reference signal is substantially the same as the input reference signal. A clock generator circuit may be configured to provide a first and second clock signal in response to an input clock signal. The first clock signal is associated with a cycle time of the switched-capacitor reference voltage circuit. A control logic circuit may be arranged to generate pulse signals for each of the first, second, and third second control signals such that the first, second, and third switching circuits are activated at different times with respect to one another.
According to another embodiment of the invention, an apparatus provides for a filtered reference voltage. The apparatus includes a first means for storing charge that is arranged to store charge. A second means for storing charge is arranged to store charge. A means for buffering is arranged to provide a buffered reference signal in response to the charge that is stored in the second means for storing charge. A means for comparing is arranged to compare the buffered reference voltage and an input reference voltage. A means for generating offset voltage is arranged to provide a first reference voltage and a second reference voltage in response to the input reference voltage. The first reference voltage is greater than the input reference voltage by a first amount. The second reference voltage is less than the input reference voltage by a second amount. A first means for switching is arranged to periodically couple a selected one of the first and second reference voltages to the first
Callahan Timothy P.
Hertzberg Brett A.
Luu An T.
Merchant & Gould P.C.
National Semiconductor Corporation
LandOfFree
Method and apparatus to achieve long time constants with a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus to achieve long time constants with a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus to achieve long time constants with a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3322594