Method and apparatus of two stage scaling and quantization...

Coded data generation or conversion – Quantizer

Reexamination Certificate

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C375S240030

Reexamination Certificate

active

07049996

ABSTRACT:
An apparatus comprising a first quantizer circuit, a memory and a second quantizer circuit. The first quantizer circuit may be configured to generate a first intermediate signal in response to (i) an input signal and (ii) a first scaling signal. The memory may be configured to (i) store the first intermediate signal and (ii) present a second intermediate signal, in response to an address signal. The second quantizer circuit may be configured to generate an output signal in response to (i) the second intermediate signal and (ii) a second scaling signal. The second quantizer circuit has a bit-width greater than the bit-width of the first quantizer circuit.

REFERENCES:
patent: 5543844 (1996-08-01), Mita et al.
patent: 5959675 (1999-09-01), Mita et al.
patent: 2003/0202582 (2003-10-01), Satoh

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