Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device
Reexamination Certificate
2000-03-20
2003-11-04
Lee, Eddie (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Charge transfer device
C257S285000, C257S657000
Reexamination Certificate
active
06642558
ABSTRACT:
TECHNICAL FIELD
This invention relates to electronics, and more specifically, to an improved technique of terminating a solid state device. The invention has particular application in high voltage termination of charge compensated devices.
BACKGROUND OF THE INVENTION
FIG. 1
shows a side cross sectional view of an exemplary prior art VDMOS device. As indicated therein, P doped regions
109
are repetitive along a top surface
114
and are typically kept at approximately ground voltage during operation of the device. The gate
111
may be operated at a conventional value of, for example, 15 volts.
At the lower surface of the device is the 600 volt terminal
113
. As a result of the structure of the device, that voltage appears at point
103
since point
103
is not electrically isolated from the bottom terminal
113
of the device having the 600 volts. In similar devices, the voltage may rise to 1000 V or more.
A region
107
is denoted T for termination, and must drop the 600 volts across the width of the region. In practical devices, T
107
may be on the order of 50 microns.
A top view of the arrangement of
FIG. 1
is shown in FIG.
2
. The border region
107
is the termination region, which must include some type of structure for dropping the 600 volts across only 50 micrometers. Section
105
represents the active region of the device.
FIG. 3
shows a typical prior art structure for providing termination of such a high voltage device. A set of floating guard rings
302
is used to control the electric field distribution around the device periphery. The number of rings in the structure depends on the voltage rating of the device. For example, 8 rings are used for a 1,000 volt device. A three dimensional computer model enables the optimum ring spacing to be determined so that each ring experiences a similar field intensity as the structure approaches avalanche breakdown. The rings are passivated with polydox, which acts as an electrostatic screen and prevents external ionic charges inverting the lightly doped N- interface to form P- channels between the rings. The polydox is coated with layers of silicon nitride and phosphorous doped oxide, as shown.
The surface area of the termination region of the device represents a source of added cost to the device. Specifically, the termination region is a substantially sized lateral width that must wrap entirely around the periphery of the device. This increase is the cost of the device, and over the large number of chips per wafer, becomes a significant source of wasted cost and space.
In view of the foregoing, there exists a need in the art for an improved technique of terminating high voltage semiconductor devices without utilizing the relatively large amount of surface area.
There also exists a need for a technique of fabricating a termination structure that is easily manufactured, and does not add significant costs to the device manufacturing procedure.
SUMMARY OF THE INVENTION
The above and other problems of the prior art are overcome in accordance with the present invention. A multiple layer solid state device is constructed wherein each layer includes a varying charge profile extending laterally through the termination region, from the edge of the active (drift) region extending laterally towards the edge of the crystal.
The charge profile, as defined herein, represents the density of deposited charge as a specified cross section is traversed. In a preferred embodiment, the charge profile is different in different layers, so that each layer of the multiple layer device includes decreasing charge density as the termination layer is traversed laterally. Moreover, a decreasing charge profile is also exhibited as a vertical cross section is traversed upwardly towards the source region of the device. In a preferred embodiment, the charge profile decreases substantially linearly along any cross section, lateral or vertical, resulting in a substantially uniform value of electric field strength.
A preferred method of making the device comprises depositing volumes of charge along each layer in a multiple layer device, in the termination region. The volume of charge in each deposit (i.e., dot) or the spacing between the deposits may be varied, with such variation being different at different layers. This causes the field strength to remain substantially constant along any horizontal or vertical cross section.
A further understanding will be gained by reference to the accompanying drawings and description.
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Letavic Ted
Simpson Mark
Koninklijke Philips Electronics , N.V.
Lee Eddie
Lee Eugene
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