Coded data generation or conversion – Converter compensation
Reexamination Certificate
2003-07-18
2004-09-14
Young, Brian (Department: 2819)
Coded data generation or conversion
Converter compensation
C341S120000, C341S110000
Reexamination Certificate
active
06791484
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to analog-to-digital conversion, and, in particular, to a method and apparatus of system offset calibration using an overranging analog-to-digital converter.
BACKGROUND OF THE INVENTION
An analog-to-digital converter (ADC) system is configured to convert an analog input signal into a digital output signal. The ADC system comprises a programmable gain amplifier (PGA) and an analog-to-digital converter (ADC). The PGA is configured to adjust the amplitude of the analog input signal to match the input signal level to the full signal range of the ADC. An offset may be present in the input signal, while another offset may be caused by the PGA. These offsets may cause significant performance degradation in the ADC conversion process.
FIG. 1
is a graphic illustration of a system transfer curve for an ADC that includes a negative offset. The digital output code corresponds to zero when a voltage associated with the analog input signal is less than the magnitude of the negative offset. As a result, codes are lost for a “deadzone” portion of the transfer curve.
FIG. 2
is a graphic illustration of a system transfer curve for an ADC that includes a positive offset. The digital output signal is clamped at a digital code that corresponds to a maximum code when the sum of the voltage that is associated with analog input signal and the offset exceeds the maximum range of the ADC. The digital output signal is saturated at the maximum code before the full voltage range of the analog input signal can be utilized such that the dynamic range of the ADC circuit is reduced.
REFERENCES:
patent: 6232897 (2001-05-01), Knusen
patent: 6422745 (2002-07-01), Glasheen et al.
patent: 6671001 (2003-12-01), Lin
“Complete 12-Bit/10-Bit 6 MSPS CCD/CIS Signal Processors” AD9807/AD9805, pp. 1-24, 1997.
Lewis et al., “A 10-b 20-Msample/ s Analog-to-Digital Converter,” IEEE Journal of Solid-State Circuits, vol. 27, pp. 351-358, Mar. 1992.
Lee Bumha
Phan Christina P.
Segerstedt Brian D.
Darby & Darby PC
Gaffney Matthew M.
National Semiconductor Corporation
Nguyen John B
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