Pulse or digital communications – Receivers – Particular pulse demodulator or detector
Reexamination Certificate
2000-10-26
2002-04-23
Pham, Chi (Department: 2634)
Pulse or digital communications
Receivers
Particular pulse demodulator or detector
C375S291000
Reexamination Certificate
active
06377635
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to data detection methods and apparatus for generalized partial-response channels in a direct access storage device, and more particularly, relates to a general methodology and apparatus for implementing high-speed and area efficient architectures for Viterbi detection of generalized partial response signals using transformed metrics, such as, the partial matched filter branch metrics and the matched filter branch metrics.
DESCRIPTION OF THE RELATED ART
Partial-response signaling with maximum-likelihood sequence detection techniques are known for digital data communication and recording applications.
U.S. Pat. No. 5,619,539 discloses data detection methods and apparatus for a direct access storage device including an 8-state extended partial-response class 4 (EPR4) trellis with modified branch metrics based upon heuristics so that the number of nonzero trellis branch constants is reduced.
U.S. Pat. No. 5,430,744 discloses a Viterbi decoder having a recursive processor modified to process each node in a trellis of a partial-response coded signal via heuristics to shift the branch metric additions over the node to effectuate compare, select, add operation order on the predecessor survivor metrics terminating in that node, to compare the metrics of the predecessor sequences terminating in the node, to select a survivor sequence, and to add the shifted branch metrics to the metric of the selected survivor sequence.
A need exists for a methodology for implementing high-speed and area efficient architectures for Viterbi detection of generalized partial-response signals. It is desirable to provide a general methodology and apparatus for implementing high-speed and area efficient architectures for Viterbi detection of generalized partial response signals using the partial matched filter branch metrics and the matched filter branch metrics.
SUMMARY OF THE INVENTION
A principal object of the present invention is to provide a methodology for implementing high-speed and area efficient architectures for Viterbi detection of generalized partial response signals including both partial matched filter and matched filter. Other important objects of the present invention are to provide Viterbi detectors for generalized partial response signals including both partial matched filter and matched filter branch metrics substantially without negative effect and that overcome many of the disadvantages of prior art arrangements.
In brief, methods and apparatus are provided for implementing high-speed and area efficient architectures for Viterbi detection of generalized partial response signals including both partial matched filter and matched filter branch metrics. In the method of the invention, branch metric terms are transformed to shift all time varying terms and some constant terms after an add compare select (ACS) unit. A total number of non-zero constants on trellis branches are minimized. The shifted time varying terms and the shifted constant terms are added directly to state metric terms.
In accordance with features of the invention, the time varying terms are expressed as outputs Z
n
of a partial matched filter or as outputs W
n
of a matched filter. For a given generalized partial response target, the time-invariance property of the Viterbi detector enables identifying the minimum number of non-zero constants on trellis branches without resorting to heuristics. The time-invariance property holds for Viterbi detectors that process multiple samples per trellis-branch, thus allowing implementations at any desired speed.
REFERENCES:
patent: 4644564 (1987-02-01), Dolivo et al.
patent: 5257272 (1993-10-01), Fredrickson
patent: 5327440 (1994-07-01), Fredrickson et al.
patent: 5430744 (1995-07-01), Fettweis et al.
patent: 5619539 (1997-04-01), Coker et al.
patent: 5621762 (1997-04-01), Miller et al.
patent: 5822360 (1998-10-01), Lee et al.
patent: 6009090 (1999-12-01), Oishi et al.
patent: 6097769 (2000-08-01), Sayiner et al.
patent: 6212661 (2001-04-01), Rub et al.
T. Conway, Implementation of high speed Viterbi detectors, I.E.E.E. Nov. 25, 1999, p.p. 2089-2090.*
T. Conway, Implementation of high speed Viterbi detectors, I.E.E.E. Nov. 25, 1999, p.p. 2089-2090.*
“Reduce-Complexity Viterbi Detector Architectures for Partial Response Signalling” by Fettweis et al., IEEE Globecom 1995 pp. 559-563.
“Adapative Maximum-Likelihood Receiver for Carrier-Modulated Data-Transmission” by Gottfried Ungerboeck, IEEE Transactions on Communications, May 1974, pp. 624-636.
Cideciyan Roy Daron
Coker Jonathan Darrel
Eleftheriou Evangelos S.
Galbraith Richard Leo
Stanek David James
Al-Beshrawi Tony
International Business Machines - Corporation
Pennington Joan
Pham Chi
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