Method and apparatus for verifying storage apparatus addressing

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364900, 365230, G06F 1100

Patent

active

044385129

ABSTRACT:
In a data storage system employing sequential data transfers for blocks of data bytes, an address offset is induced in the addressing mechanism such that each block transfer requires loading the address mechanism with an address of a block to be accessed. Address offset is preferably induced by inserting a blank register between adjacent blocks.

REFERENCES:
patent: 3815103 (1974-06-01), Holtey et al.
patent: 4174537 (1979-11-01), Chu et al.
patent: 4292674 (1981-09-01), Scheuneman

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