Method and apparatus for verifying a target instruction before e

Details Method and apparatus for verifying a target instruction before e Method and apparatus for verifying a target instruction before e

1995-06-07

1997-06-17

Kim, Kenneth S.

39518306, 395800, G06F 1100

Patent

active

056405030

ABSTRACT:
A Test Operation-Code (TSTOP) instruction pre-verifies the validity of a target instruction op-code prior to execution of the target instruction. The pre-verification function, contained within CPU execution unit microcode, sets a return value in a program status word to indicate one of four conditions:

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