Method and apparatus for verification of assembled printed...

Electric heating – Metal heating – By arc

Reexamination Certificate

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C219S121680, C219S121670

Reexamination Certificate

active

06489586

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to the field of electronics assembly, and more particularly, to the assembly of components onto printed circuit boards (“PCB's”). Specifically, this invention relates to a method and apparatus for verifying the correct placement of components on PCB's.
2. Description of Related Art
In applications in which components are assembled onto PCB's, it is often necessary to monitor the boards at a particular stage or stages, in order to determine whether the assembly process is performing properly. Specifically, it is desirable to verify the correct placement of the various components attached to a PCB in order to guard against common manufacturing problems before the entire manufacturing process is complete. PCB's that are found to be defective must either be repaired or discarded. The further along in the manufacturing process that a defect is caught, the more costly it is to repair, and the more time and money is wasted if the board must be discarded. Catching defects earlier in the manufacturing process cuts down on the time and money that is wasted in finishing a defective board that must either be repaired or discarded.
PCB's are often produced in lots. Boards within a given lot may tend to have problems resulting from tolerance error in the placement of components on the boards. Common manufacturing problems include missing and misplaced components. Components may be missing for a variety of reasons including incorrect programming, empty component trays or reels, misplaced trays or reels, or pick and place machine malfunction. “Misplaced components” include a number of different related problems. For example, a component's orientation could be incorrect or reversed. This is particularly problematic for components that are sensitive to polarity, such as diodes and capacitors. In addition, a component could be mounted askew on the mounting pad, causing it to perform unreliably or not at all. Another problem is known as “tombstoning”, in which one side of a component pulls free from its mounting, resulting in an open circuit.
One way of verifying the correct assembly of components is through the use of a “functional test.” Here, a PCB is completely assembled and then hooked to testing equipment to check whether it performs as expected. Because a board must be completely assembled before it is checked, the use of this test can be wasteful if the board fails because of a defect occurring early in the assembly process. Further, programming the testing equipment is often time and labor intensive, making it difficult to reconfigure to test different PCB's. In addition, the initial expense of the testing equipment is typically quite high.
Two other common verification methods are known as “in-circuit” testing and “automatic optical inspection”. With in-circuit testing, a probe is used to test specific circuits to ensure that the circuit returns appropriate values to the a test stimuli. This test does not check the functionality of the board. Like the functional test, in-circuit testing usually occurs towards the end of the manufacturing process when many of the circuits are complete. Thus, the test is wasteful if the board does not pass due to a defect that occurs early in the manufacturing process. As its name suggests, automatic optical inspection utilizes equipment that automatically checks for the correct placement of components using optical recognition. The equipment required for both in-circuit testing and automatic optical inspection is usually quite costly. Further, reprogramming the equipment for use with different products and/or manufacturing lines is time consuming and fairly expensive.
Overlays may be used to quickly verify the location, placement and proper orientation of surface mount components on PCB's. Outlines of the individual components to be verified may be cut out of the overlay. Thus, an overlay may be configured to fit over an assembled PCB's such that the individual components project into the corresponding holes. An operator may quickly scan the overlay to verify the correct placement of components on the PCB.
Prior overlay devices are often significantly less expensive any of the three verification methods mentioned above. Overlay devices are an attractive option for contract circuit board manufacturers because they change their products and consequently their assembly lines quite often. It is often more practical to use an overlay designed for each assembly line rather than reprogramming the equipment in any of the three verification methods mentioned above.
However, drawbacks with prior art overlay devices have limited their usefulness. For example, many prior art, overlays are not very precise because the cutouts are made using unwieldy cutting devices such as mechanical routers. This problem is of particular consequence because the size of components is shrinking rapidly while their density on circuit boards is increasing at the same rate. In addition, verification using overlay devices requires the user to physically handle the circuit boards to be tested, exposing the boards to the risk of damage from static discharge if the overlays are made of static harboring materials such as phenolic or fiberglass. Similarly, there is a risk of electrical discharge with overlays made of conductive materials such as stainless steel. Stainless steel overlays are also fairly heavy and may have sharp edges that could cut the operator.
SUMMARY OF THE INVENTION
Disclosed is an overlay device and method of making an overlay for verifying the placement of components on PCB's. The disclosed overlay may be used to provide users a relatively simple, accurate, and inexpensive way of verifying the correct assembly of components on a PCB.
Advantageously, the disclosed overlay has static dissipative properties. Using the disclosed overlay, a user may be far less likely to damage components due to static and/or electric discharge. In one embodiment, the overlay may be made from a static dissipative material. In an alternative embodiment, the outer surface of the overlay may be coated with a static dissipative material.
As a further advantage, the cutouts of the disclosed overlay may be made by a high precision cutting device. Thereby, cutouts may more precisely correspond to the desired shapes of the components to be verified. In one embodiment, the high precision cutting device may be a laser. An advantage of using a non-mechanical cutting device such as a laser is that cutouts may be located closer to one another. The vibrations caused by mechanical cutting devices such as routers may have the tendency to tear through thin portions of overlay between cutouts that are located in close proximity to one another.
In various embodiments, the cutouts may be in the shape of polygons. In one embodiment, the shape of each polygon may correspond substantially to the shape of the respective target component, In another embodiment, the shape of each polygon may correspond to the shape of the leads of each respective target component. In an additional embodiment, the shapes of the polygons may correspond to the shape of the respective target component, the shape of the leads of each respective target component, or both the shape of the leads and the target component. Though polygon-shaped cutouts have been disclosed, it is to be understood by those of skill in the art that the cutouts may be cut into any desired shape that fits within the overlay.
In various embodiments, the disclosed overlay may be made from a light-weight and/or flexible material. Advantageously, such overlay devices may be easier to use than prior art overlay devices, particularly given the repetitive manner in which they may be used. Flexible overlays may be more resilient and less prone to cut operators than overlays made from rigid material such as stainless steel. As an additional advantage, the disclosed overlay may often be made much less expensively than other prior art

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