Patent
1993-06-30
1996-02-20
Harvey, Jack B.
395281, 395306, 395309, 395650, 395800, G06F 1300, G06F 1326
Patent
active
054936551
ABSTRACT:
A data processing system includes a first central processing unit (CPU), at least one expansion port into which additional CPUs may be inserted, and a system controller. Interrupt circuitry coupled to said first CPU, said at least one expansion port, and said system controller, is configured to allow the dam processing system to operate as a multi-processor system, only one of the first and additional CPUs communicating with the system controller at any one time.
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IBM Technical Disclosure Bulletin, vol. 35, No. 3, Aug. 1992, NY US pp. 306-316.
07/872,611 Apr. 22, 1992 (filed).
07/998,879 Dec. 28, 1992 (filed).
Liao Wen-Lu
Shen Cheng-Lai
Shih Kuo-Piao
Acer Incorporated
Harvey Jack B.
Seto Jeffrey K.
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