Excavating
Patent
1996-09-30
1998-03-10
Baker, Stephen M.
Excavating
G01R 313185
Patent
active
057269998
ABSTRACT:
A circuit and technique is described for adding boundary scan test capability to circuit boards and systems, thereby improving the ability to test and verify proper operation of such systems using nonintrusive methods. An integrated circuit consisting of a serial path of input/output buffers, an instruction register, and a serial test access port circuit is described. The integrated circuit can be coupled to a number of input and output signals, and the serial test bus is then used in conjunction with the test access port and instruction register circuitry to observe or control any or all of the signals present at the pins of the integrated circuit. Each pin may be programmed as an input or output for a particular operation. Because the integrated circuit is programmable and can be applied to any system, the need for design of special test hardware is eliminated, and the user may build in boundary scan capability into any arbitrary system. This is of particular importance when adding test capability to systems comprised of an array of off-the-shelf components, many of which do not have these capabilities.
REFERENCES:
patent: 5260948 (1993-11-01), Simpson et al.
LeBlanc, J., "LOCST: A Built-In Self-Test Technique", IEEE Design & Test, pp. 45-52, Nov. 1984.
A Standard Test Bus and Boundary Scan Architecture, Lee Whetsel; Texas Instruments Technical Journal, Jul.-Aug. 1988, vol. 5., No. 4, pp. 48-59.
Turino, J., Design to Test, 2nd ed., Van Nostrand Reinheld, 1990, pp. 185-220.
Bradford William F.
Glass Richard J.
Baker Stephen M.
Courtney Mark E.
Donaldson Richard L.
Franz Warren L.
Texas Instruments Incorporated
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