Method and apparatus for transparently switching clock sources

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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331 25, H03L 700

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active

050599259

ABSTRACT:
A method and apparatus for stably maintaining an output clock signal from a phase-locked loop (PLL) frequency multiplier when switching from one clock source to another clock source is described. This method and apparatus maintains the phase relationship between the external signal to the phase detector and the feedback signal from the divider to the phase detector.

REFERENCES:
patent: 4668922 (1987-05-01), Crawford et al.
patent: 4754235 (1988-06-01), Fujiwara
patent: 4812783 (1989-03-01), Honjo et al.
patent: 4893094 (1990-01-01), Herold et al.
"PCM Jitter Attenuator", Crystal Semiconductor Corporation Data Book, vol. 2, pp. 5-3 through 5-14 and 11-31 through 11-32 (Apr. 1990).

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