Method and apparatus for transmitting message cells via an ATM c

Details Method and apparatus for transmitting message cells via an ATM c Method and apparatus for transmitting message cells via an ATM c

1993-12-09

1996-04-09

Hsu, Alpus

Multiplex communications

Wide area network

Packet switching

370 942, H04J 326, H04L 1256

Patent

active

055068421

ABSTRACT:
An interface (SSE) is provided for transmission of message cells appearing on an offering trunk (ZL) with a specific transmission bit rate and belonging to different virtual connections or virtual paths via inputs of an ATM communication equipment (ATM-K) designed for a lower transmission bit rate. This interface includes a plurality of processors (MBHE, SBHE1, . . . , SBHE3) connected to the offering trunk which have their output sides respectively connected to at least one of the inputs. Under the control of one of the processors as a master processor (MBHE), the message cells are cyclically distributed onto all processors and, subsequently, are forwarded by these processors to the ATM communication equipment, upon attachment of a sequence number that is valid at the moment for the respective virtual connection or respective virtual path.

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IEEE Journal on Selected Areas in Communications, Oct., 1991, No. 8, "Design and Technology Aspects of VLSI's for ATM Switches", Thomas R. Banniza et al., pp. 1255-1265.
Patent Abstracts of Japan; Publication Number JP60030237, published Feb. 15, 1985, Asahina Takeshi et al, "Data Transmission System".

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