Patent
1991-08-21
1994-06-14
Shaw, Dale M.
395164, G06F 1520
Patent
active
053218060
ABSTRACT:
A residue buffer, for temporary storage of portions of transmissions from a CPU to a graphics processor. Graphics commands are transmitted, in transmission units of uniform size, from a processor unit to an address generator, which processes the commands. The portion of the transmission unit not immediately usable by the graphics processor is stored in the residue buffer. The disclosure further describes a computer graphics system, having a graphics processor capable of reading from or writing to main memory, including virtual memory, without any action by the CPU; having a duplicate cache tag store accessible by the graphics system without generating traffic on the system bus; having a FIFO command buffer in main memory for temporary storage of graphics commands; having a "short circuit" feature for routing graphics commands to the command processor in the minimum number of steps; having a cursor control system capable of storing cursor pattern information in, and retrieving cursor pattern information from, main memory; having a cursor bus that is reconfigurable to carry information other than cursor information; and having a frame buffer module that contains no timing or cursor control circuitry.
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Case Colyn
Irwin John
Krishnaswami Srinivasan
Masucci Agnes
Meinerth Kim
Cefalo Albert P.
Digital Equipment Corporation
Satow Clayton L.
Shaw Dale M.
Tung Kee M.
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