Method and apparatus for transmitting a synchronous data signal

Pulse or digital communications – Repeaters – Testing

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375120, H04B 1500

Patent

active

049205455

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The invention relates to a method and apparatus for transmitting a synchronous data signal on a transmission medium on which the transmission rate is greater than the data signal bit rate, wherein the data signal in a transmitter is converted by its being over-sampled with a sampling frequency which is equal to the transmission rate on the transmission medium, that the data signal formed by the conversion is transmitted on the transmission medium, wherein a clock signal is formed in a receiver such that this signal is phase-locked to the transmitted data signal and has a frequency which at least practically is equal to the bit rate of the original, synchronous data signal, and wherein the transmitted data signal is re-sampled with the clock signal formed in the receiver.


BACKGROUND ART

An apparatus according to the above is already essentially known from the U.S. Pat. No. 3819853.
In an apparatus of this kind there can be problems, should certain special bit combinations occur in the synchronous data signal which is supplied to the transmitter, or should certain special frequency conditions prevail between the synchronous data signal and the transmitted data signal. This can result in an uneven distribution of the edge positions of the transmitted data signal in relation to their mean positions. In turn, this can cause the clock signal generated in the receiver to be incorrectly locked, i.e. that the signal will not be locked to the mean positions proper of the edges. In an unfortunate case, for example, all the received edges except one could be situated on one side of the mean position and the remaining one a long way cut on the other side of the mean position. Practically speaking, the clock signal would then be locked to the mean position of the edges situated on one side of the mean position proper. The edge situated on the other side of the mean position would only give rise to short-duration floating of the locked-in position of the clock signal. If the locked loop were to be made sufficiently low-frequency (slow) to avoid this it would lose its locking-in ability completely.


DISCLOSURE OF INVENTION

The object of the present invention is to propose a method of the kind mentioned in the introduction, according to which the above mentioned problems are avoided. This is achieved by the synchronous data signal in the transmitter being converted such that uneven distribution according to the above of the edges of the transmitted data signal is avoided. Accordingly there is also avoided incorrect locking-in of the clock signal generated in the receiver. The invention also relates to an apparatus for carrying out the method.
The characterizing features of the invention are apparent from the claims.


BRIEF DESCRIPTION OF DRAWINGS

The invention will now be described in more detail below with reference to the drawings, on which
FIG. 1 illustrates an example of a known apparatus for transmitting a synchronous data signal;
FIG. 2 is a diagram illustrating examples of signals and parts of signals occurring in the apparatus according to FIG. 1;
FIG. 3 illustrates a more detailed implementation of the embodiment according to FIG. 1 and;
FIGS. 4-6 illustrate first, second and third embodiments of an apparatus in accordance with the invention.


BEST MODES FOR CARRYING OUT THE INVENTION

In FIG. 1 there is illustrated an example of a known apparatus for transmitting a synchronous data signal, and in FIG. 2 there are illustrated examples of signals occurring in the apparatus according to FIG. 1. A conversion means included in a transmitter is denoted by the numeral 1. The conversion means obtains a synchronous data signal D1 with the bit rate X bits/s on a data input and a clock signal C1 with the frequency Y Hz on a clock signal input. In the example, Y is 1.4 times as great as X. The synchronous data signal D1 with the bit rate X bits/s is converted in the means 1 to a data signal D2 with the bit rate Y bit/s. The conversion takes place with so-called over-sampling, by which is intended tha

REFERENCES:
patent: 3244808 (1966-04-01), Roberts
patent: 3564414 (1971-02-01), Ebert

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