Method and apparatus for trading performance for precision when

Details Method and apparatus for trading performance for precision when Method and apparatus for trading performance for precision when

1995-11-13

1999-03-23

Moise, Emmanuel L.

Boots, shoes, and leggings

364715011, 3647365, 36474803, 36474816, G06F 700, G06F 1500, G06F 738

Patent

active

058869158

ABSTRACT:
An apparatus to improve the speed of handling of denormal numbers in a computer system, the apparatus comprising a mode bit and a selector, the mode bit set when denormals are to be replaced by zero, the selector having a first input and an output, the first input comprising a floating point number, the selector selecting zero to become the output when the floating point number is denormal and the mode bit is set, the selector selecting the floating point number to become the output otherwise.

REFERENCES:
patent: 4800516 (1989-01-01), Si et al.
patent: 4926370 (1990-05-01), Brown et al.
patent: 5268855 (1993-12-01), Mason et al.
patent: 5337265 (1994-08-01), Desrosiers et al.
patent: 5375212 (1994-12-01), Saini
patent: 5384723 (1995-01-01), Karim et al.
patent: 5416912 (1995-05-01), Saini
patent: 5421021 (1995-05-01), Saini
patent: 5602769 (1997-02-01), Yu et al.
patent: 5685009 (1997-11-01), Blomgren et al.
Intel i860 64-BITTM Microprocessor (Oct. 1990).
Intel i860TM 64-BIT Microprocessor Programmer's Reference Manual i860 (1989).

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