Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
2008-05-27
2008-05-27
Shah, Kamini (Department: 2128)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C703S019000, C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07379855
ABSTRACT:
Method and apparatus for timing modeling is described. More particularly, wire information, including wire lengths, is obtained from a routing output. Signals associated with such wire information are classified as input or output signals from an embedded core. Respective templates are automatically selected for the input signals and the output signals, respectively, at least in partial response to the wire lengths. Furthermore, timing information for the embedded core is obtained and classified according to condition, and the input signals and the output signals from the embedded core are determined to obtain rise and fall timing information for such signals.
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Xilin
Burnley Richard P.
Oda Shizuka
Lo Suzanne
Shah Kamini
Webostad W. Eric
Xilinx , Inc.
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