Optics: measuring and testing – Shape or surface configuration – Triangulation
Reexamination Certificate
2001-01-29
2002-08-13
Font, Frank G. (Department: 2877)
Optics: measuring and testing
Shape or surface configuration
Triangulation
C356S394000, C356S392000, C356S606000, C430S030000, C430S005000
Reexamination Certificate
active
06433878
ABSTRACT:
BACKGROUND OF THE INVENTION
Computer chips or microcircuits are fabricated using a complex sequence of processing steps consisting of many individual pattern processing steps. As the semiconductor industry continues to shrink the microcircuit designs to create faster microcircuits at lower cost, the semiconductor manufacturing methods have become very complex. The pattern processing sequence typically consists of a photolithographic process and a plasma etch process. Photolithography is the process of creating a 3-dimensional image, using a photomask or reticle pattern, onto a suitable recording media such as a photoresist film on top of a semiconductor substrate or silicon wafer. The process is performed using a photolithographic exposure tool such as a stepper or scanner. Today it takes about 25 pattern processing steps or layers to build-up a modern semiconductor microcircuit.
An example of a typical photolithographic exposure sequence for the polysilicon gate layer of a typical semiconductor microprocessor might include the following sequence of events: As shown in
FIG. 1
, Deep-ultraviolet light is passed through binary (chrome patterned glass) photomask
1
via projection (4×or 5×reduction) lens
24
so that it illuminates a layer of photoresist
2
at the proper de-magnification. After exposure the positive photoresist is sent through the final few steps of the photolithographic process and is developed out to form a 3-dimensional resist pattern on top of an antireflective coating
26
. The resulting resist pattern
4
is shown in FIG.
2
A. (Antireflective coating layer
26
is only shown in FIG.
1
). The final etch pattern
27
, after etching and removal of the photoresist, is shown in FIG.
2
B.
Semiconductor manufacturers produce high quality and lower cost microcircuits when the lithographic patterns etched into the semiconductor surface meet the intended physical design rule specifications. To meet this goal, each lithographic feature must have the proper critical dimension (CD), sidewall angle &thgr;, and the proper height as determined by the design rules and pattern processing requirements (see
FIG. 3
) However, most modem lithographic and plasma etch processes—especially those where the width of the CDs on the photomask approaches the size of the exposure wavelength—are very difficult to control in practice. The lithographic and final etch specifications depend on the microcircuit design and the fabrication process and the methods used to control them. As microcircuit patterns become smaller the specifications have become very difficult to meet—thus process yields suffer driving margins lower. Today, researchers are developing new techniques in an attempt to improve the process. Known techniques include wavefront engineering (such as optical proximity correction (OPC) and the use of phase shift mask (PSM)) and the metrology used to measure the performance of these optical enhancements.
Optimizing the Resist and Final Etch Patterns
In very general terms the design engineer, optical scientist, and process engineer are interested in two main characteristics of the lithographic features, the feature size called the critical dimension (CD) and the overall 2-D cross-sectional shape of the resist or etched features. For reasons of yield, device performance and functionality, a process that is capable of producing fine lines at all relevant pitches with the proper 2-D profile is highly desirable. While it may be possible to design a photolithographic and etch process for one particular lithographic feature (for example, 100 nm CD with a 200 nm pitch), in practice one is almost always forced to design photolithographic and etch processes for more complex situations. For example, the photomasks for most polysilicon gate layers usually contain a very complex array of patterned lines of similar CDs with various pitches. It should be noted that isolated features (where the pitch is much greater than the CD) act optically very different as compared to dense features (where the CD is nearly equal to the pitch)—this translates into different lithographic performance. For the same exposure dose, isolated features tend to have smaller CDs as compared to dense features. This asymmetry causes problems. Today, optical scientists are continuously trying to improve the manufacturability of these difficult semiconductor processes by using wavefront engineering techniques, such as OPC and PSM, and complex electromagnetic simulator computer programs to modify the photomask design and improve the quality of the microcircuit.
Mask
1
, as shown in
FIG. 1
, is known as a binary mask in that the patterned area is either clear or opaque. Light from the photolithographic exposure tool diffracts as it passes through the clear regions
10
just prior to being imaged by the projection lens. The opaque regions
11
block the remaining portions of the light source. The creation of this photomask is not a perfect process and the CDs on the photomask are themselves a source of problems for the optical scientist and process engineer. In fact, as the feature size on the photomasks continues to shrink the process sensitivity to photomask error increases. This effect is known as mask error factor and is another area of concern (see for example, “Understanding Mask Error Factor For Sub-.18 um Lithography” ARCH Microlithography Symposium Proceedings Nov. 5-7, 2000). OPC and PSM techniques have been created to address these issues as well.
Finally, as semiconductor manufacturers have continued to decrease the CD, diffraction effects at the mask have made it very difficult to maintain vertical resist patterns (see for example, the book edited by P. Rai-Choudhury
Microlithogra-phy Micromachining and Microfabrication
, SPIE press, 1997). The challenge of semiconductor manufactures has been to create robust processes that can print very small lines with dramatically different pitch characteristics. Here robust process means—a patterning process that can produce the desired CDs and side wall angles (typically>80° degrees) for each feature type over a wide range of process conditions.
FIG. 3
shows a resist profile with an ideal side wall angle of approximately 90° degrees. For most processes layers (such as polygate layers, metal layers, contact layers etc.,) the process engineer is typically most concerned with the following process variables: exposure, focus, post exposure bake temperature, post exposure bake time, develop time and resist thickness. In practice these variables are not held constant and change constantly due to systematic and random fluctuations of the processing equipment. For example, a slight change in focus of say 0.1 um may change the CD of a given feature by 5 nm. It therefore is desirable to implement control techniques that produce lithographic processes that are less sensitive to changes in the process variables and create features that act similarly in a lithographic sense.
OPC is a new but fairly well known method of selectively altering the patterns on a mask in order to more exactly obtain the desired printed patterns in the photoresist by modifying the diffracted light pattern (a good discussion of these techniques and examples can be found in the book by P. Rai-Choudhury “Microlithography, Micromachining and Microfabrication” SPIE press, 1997). As shown in
FIG. 4
, the pattern on mask
15
has been altered by adding OPC lines
16
. In addition, OPC techniques have been shown to create more robust lithographic processes (in the sense mentioned above) by creating photomask features that are less sensitive to process variations.
FIG. 5
shows phase-shifting mask
17
. Phase-shifting mask
17
is a mask that contains a spatial variation not only in intensity transmittance but phase transmittance as well. Phase-shifting mask
17
has clear regions
18
and
20
that produce a half wave phase shift in the light transmitted through the clear portions of mask
17
.
It is also possible to fabricate a mask that combines the features shown in
FIGS. 4 and 5
. For ex
Jakatdar Nickhil H.
Niu Xinhui
Font Frank G.
Morrison & Foerster / LLP
Nguyen Sang H.
Timbre Technology, Inc.
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