Method and apparatus for the design and fabrication of integrate

Details Method and apparatus for the design and fabrication of integrate Method and apparatus for the design and fabrication of integrate

1989-05-23

1994-01-25

Trans, Vincent N.

Boots, shoes, and leggings

364490, 364489, 364488, G06F 1560

Patent

active

052821480

ABSTRACT:
A process of realizing large scale integrated circuits by means of a programmed data processor includes minimizing timing delays in the technology mapping phase by employing algorithms which are based on a linear model in terms of number of inputs and a load capacitance of a gating function and which permit a decomposition of the gating function into gates having m inputs and [(n-m)+1] inputs wherein m is greater than two. Balanced decompositions may be allowed in appropriate conditions.

REFERENCES:
patent: H354 (1987-10-01), Rubin
patent: T940008 (1975-11-01), Oden et al.
patent: T944001 (1970-03-01), Hanan et al.
patent: 3622762 (1971-11-01), Dyer
patent: 3702003 (1972-10-01), Ramirez, Jr. et al.
patent: 4924430 (1990-05-01), Zasio et al.
patent: 4945503 (1990-07-01), Takasaki
patent: 4954953 (1990-09-01), Bush
"MIS: A Multiple-Level Logic Optimization System" by R. K. Brayton et al., IEEE Trans. on Computer-Aided, vol. CAD-6, No. 6, Nov. 1987, pp. 1062-1081.

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