Data processing: measuring – calibrating – or testing – Testing system – Of circuit
Reexamination Certificate
2006-08-15
2006-08-15
Barlow, John (Department: 2863)
Data processing: measuring, calibrating, or testing
Testing system
Of circuit
Reexamination Certificate
active
07092838
ABSTRACT:
A method and apparatus are presented that can analyze the performance of an integrated circuit design at multiple corners, under multiple modes, and for multiple objectives efficiently and simultaneously. The extraction, timing analysis, and optimization functions are integrated into a mechanism that provides a novel problem formulation. A plurality of virtual timing graphs are maintained and updated simultaneously by providing a data structure that can efficiently store operating data for an arbitrary number of conditions at each node. This data structure is populated according to the design, and as optimizations are made, the operating data for all design conditions is updated simultaneously. Timing violations can be reported across all corners and modes. By integrating this multi-corner multi-mode analysis with circuit optimization, a convergent mechanism is provided. In this way, design constraints are evaluated simultaneously for an arbitrary number of design conditions.
REFERENCES:
patent: 2004/0251544 (2004-12-01), Hussa
patent: 2005/0104017 (2005-05-01), Kimba et al.
Krishnamoorthy Shankar
Srinivas Prasanna Venkat
Srinivasan Atul
Barlow John
Lau Tung S.
O'Melveny & Myers LLP
Sierra Design Automation, Inc.
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