Method and apparatus for testing supply connections

Details Method and apparatus for testing supply connections Method and apparatus for testing supply connections

2000-09-22

2003-03-11

Sherry, Michael (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S537000, C324S713000

Reexamination Certificate

active

06531885

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to testing supply connections of electronic circuits.
BACKGROUND OF THE INVENTION
An on-board monitor, which is integrated with the functional circuit on the same silicon or substrate, is used for the verification of the power and ground soldering connections of a circuit with multiple power and ground pins when the package containing the circuit is mounted on a PCB board or an interconnection substrate. Such a monitor becomes more important as the number of device pins as well as the number of supply and ground pins increases and the pin dimensions of the package decreases.
A currently used inspection technique is for instance X-ray inspection.
Multiple power/ground pin connections cannot be tested easily once the package is mounted on the board. Electrical testing techniques fail because the power/ground pins are connected in parallel between the package and the board. Hence, a failing connection to one of these pins only marginally affects the overall contact properties, which when considering device tolerances makes it impossible to draw a clear conclusion. Despite the fact that due to a missing/failing connection the overall power/ground connection parameters are only slightly modified, such a problem will affect circuit operation, performance and reliability, when designers cannot afford as many power pins as required to have adequate margins. See M. Tegethoff, K. Parker, K. Lee, “Opens Board Test Coverage: When is 99% really 40%, Proceedings of the International Test Conference 1996 ITC96, pp. 333-339, Oct. 20-25, 1996, Washington D.C., USA.
Verifying the connectivity of a power/ground pin is easy when only one power/ground pin is used to feed a circuit, as a connectivity problem will result in a functional failure of the circuit. However, when the circuit is fed through multiple power/ground pins, verifying that each of these pins is connected properly is a difficult tasks as the pins are normally tied together electrically on the board and in the circuit and act as a set of parallel connection paths.
To solve this problem, a circuit is needed which is capable of verifying each power/ground pin connection independently, under the constraint that they are all tied up at board level and in most cases also at circuit level, and without affecting the supply/ground level of the circuit which is fed by these pins. Taking into consideration the desired very low resistance (order of magnitude: 10 m&OHgr;) of each power/ground connection between bonding pad and power/ground ring, the circuit should be highly sensitive. Furthermore, to be of practical use, the operation of the test circuit should not be affected by process parameter variations and tolerances (excluding the need for calibration) and provide a high repeatability of the test results, even under difference test conditions.
The current state of the art verification techniques do not provide such characteristics. State of the art techniques are, for instance, the use of vision techniques and the use of current (I
DDQ/T
) monitors. Vision techniques, such as the use of X-ray inspection, are expensive and time consuming and their application is limited in function of pin pitches and packages types. See J. Titus, B. Kerridge, “X-Ray Systems Reveal Hidden Defects”, Test & Measurement Europe, August-September 1998, pp 8-19. Traditional current monitors are not sensitive enough, in most cases affecting the supply levels of the circuit under test and requiring calibration procedures to cope with process parameter variations and tolerances.
AIM OF THE INVENTION
It is an aim of the invention to present an apparatus and method for testing supply connections of electronic circuits with a high sensitivity.
SUMMARY OF THE INVENTION
In a first aspect of the invention, a test device (
900
) for testing a supply connection (
80
) of an electronic device (
10
) by measuring a test current flowing in said supply connection (
80
) is presented. Said test current flows from the power supply (
70
) in said supply connection (
80
). A current can also flow through the supply connection (
400
).
Said test device comprises at least a current mirror (
20
), being characterized by at least two branches (
90
)(
100
). At least one end of each of said branches (
90
)(
100
) is connected to a different location of the supply connection (
80
) to said electronic device (
10
) through connections (
110
)(
120
). Said current mirror (
20
) is adapted for generating an output voltage on line (
140
), being related to said test current. In a current mirror, in a typical operation, currents in said branches are generated which are proportional to each other with a fixed proportionality factor being determined by the parameters of the transistors in the branches of said current mirror. In the invention, the typical operation of a current mirror is not exploited. Indeed said current mirror generates an output voltage on line (
140
) being related to said test current and therefore generates currents in said branches whereby said proportionality factor is not necessarily respected. Still the terminology current mirror can be exploited as the circuitry still matches the current mirror layout.
In an embodiment of this aspect of the invention, said test device (
120
) further comprises means (
150
) for forcing said test current through said supply connection (
80
). Said means can be a switch (
150
) connected to ground. Ground and power supply can be reversed.
In an embodiment of this aspect of the invention, said test device (
120
) comprises means (
160
) for sampling said output voltage.
In an embodiment of this aspect of the invention, said test device (
120
) said test is integrated with said electronic device (
10
) on one integrated circuit (
130
).
In an embodiment of this aspect of the invention, said test device (
120
) is used for testing a CMOS electronic device.
In an embodiment of this aspect of the invention, said test device (
120
) is such that said test current flows also in said electronic device (
10
). Said switch (
15
) is then not necessary.
In a second aspect of the invention, a method for testing a supply connection (
80
) of an electronic device (
10
) by measuring a test current flowing from the power supply (
70
) in said supply connection is presented. A current can also flow through the supply connection (
400
).
Said method comprises at least of generating an output voltage on line (
140
) with at least a current mirror (
20
). Said current mirror is characterized by at least two branches (
90
)(
100
). At least one end of each of said branches is connected to a different location of the supply connection (
80
) to said electronic device via connections (
110
)(
120
). Said output voltage on line (
140
) is related to said test current. In a typical operation, the current mirror generates currents in the branches being proportional with a fixed proportionality constant. In one aspect of the invention, the typical operation is not exploited. Instead, the current mirror generates currents in said branches such that an output voltage is generated which is related to said test current. The proportionality between currents is therefore not respected.
In an embodiment of said second aspect of the invention, said test current is forced through said supply connection (
80
) for instance via switch (
150
) to the ground (
65
). Note that power supply and ground can be reversed.
In an embodiment of said second aspect of the invention, the following steps are found in the method. In a first step, a first output voltage being said output voltage on line (
140
) is determined or measured for zero test current by said means (
160
). In a second step, a second output voltage being is determined or measured by said means (
160
) while forcing said test current through said supply line (
80
). Said first step and second step can be reversed. In a third step, a third output voltage on line (
170
) is generated by said means (
160
). Said third output voltage is based on said first and second output

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