Patent
1996-12-18
1999-06-08
Teska, Kevin J.
395551, 395559, 39518313, 39518315, 39518322, 39518306, G06F 9455
Patent
active
059110597
ABSTRACT:
A system for testing and analyzing electronic systems, including a target processor and simulated target circuitry, and an associated target program to be executed on the target microprocessor. The system includes a processor emulator employing a hardware device for emulating the target microprocessor. The processor emulator has a memory for storing a plurality of computer instructions, including the target program and associated data. The processor emulator communicates with the memory to receive computer instructions from the memory and to access program specific data structures. The system further includes a hardware simulator adapted to simulate the target circuitry. A communications interface controls communication between the processor emulator and the hardware simulator. The processor emulator communicates with the hardware simulator using the communications interface when an event requires interaction of the target program with the target circuitry. A synchronization circuit contained in the communications interface synchronizes the processor emulator and the hardware simulator at a time other than when an event requires interaction of the target program with the target circuitry.
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Applied Microsystems, Inc.
Phan Thai
Teska Kevin J.
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