Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1999-07-12
2002-05-21
Le, N. (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S1540PB
Reexamination Certificate
active
06392433
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a method and an apparatus for testing semiconductor devices, and particularly relates to a method and an apparatus for testing small-sized semiconductor devices such as a leadless surface mount type.
Recently, along with miniaturized electronic components, semiconductor devices of a leadless surface mount type, referred to as CSP (Chip Size Package), have become one of the major types of semiconductor devices. Also, a further improvement of the reliability and a further cost reduction are required for the semiconductor devices.
In order to improve the reliability, it is necessary to implement an accurate test on the semiconductor devices. Also, in order to reduce the cost of the semiconductor devices, such a test should be implemented with a higher efficiency and with reduced cost.
2. Description of the Related Art
The semiconductor devices of the CSP type of the related art are tested as follows. Individualized semiconductor devices are uniformly aligned on a tray (accommodation container). Then, one or more of the semiconductor devices undergoes an electrical characteristic test by means of a horizontal-carrying-type test unit (handler). After the electrical characteristic test, the semiconductor devices are returned to the tray in such manner that they are categorized into good devices and bad devices.
Also, tested semiconductor devices are shipped to customers with while remaining accommodated in the tray, or being accommodated on an embossed tape provided with pockets and a cover, and wound on a reel.
When the semiconductor device (IC chip) is tested in the state of a wafer, first, the wafer is set on equipment having an XY&thgr; driving system which equipment is referred to as an autoprober. Then, a probe, consisting of needle-like contacts, is brought into contact with electrodes (aluminum pads) on the IC chip. Thus, an electrical characteristic test is implemented. Such a testing method making use of the autoprober is implemented before dicing the wafer. The prerequisite for a such testing method is that each IC chip is positioned and aligned with a high accuracy of an angstrom order.
However, there are some drawbacks when testing the semiconductor devices using the handler of the related art. The semiconductor devices must be peeled off from an adhesive tape used for dicing and then aligned by means of an aligning unit. Alternatively, the semiconductor devices aligned on the adhesive tape can be pushed up by a picker, peeled off from the tape, and then transferred to a tray.
In the testing method using the handler, the semiconductor devices are individualized prior to the electrical characteristic test. Also, recently, the semiconductor devices have a high-density structure such that a pitch between terminals is under 0.5 mm. Therefore, since the positioning of the semiconductor devices is difficult, there is a drawback that it is difficult to achieve an accurate contact between the electrodes of the semiconductor device and contact pins of an electrical characteristic test unit. Further, there is a drawback that, since a variety of components are required when there is a change in the outer shape of the semiconductor devices, the handler lacks a general purpose use.
In the testing method using the autoprober, the electrical characteristic test is implemented by means of a needle-like prober having a long line length and thus high impedance. Therefore, there is a drawback that an electrical characteristic test of a high-frequency IC is not possible.
Also, there is a further drawback in a case of a high-density semiconductor device with a terminal pitch of less than 0.5 mm, or a semiconductor device provided with terminals provided as an array in an area. With such semiconductor devices, a needle-like prober having a short line length is not sufficient for achieving a secure contact with the terminals provided on the semiconductor devices. Therefore, it is not possible to implement the test with the prober having a short line length.
Further, in the case of the test using the autoprober, the test is implemented before dicing. Therefore, there is a drawback that it is not possible to take into account a stress produced in the IC chip by dicing.
SUMMARY OF THE INVENTION
Accordingly, it is a general object of the present invention to provide a semiconductor device of a high-density structure which can overcome the above-described drawbacks.
It is another and more specific object of the present invention to provide a method and an apparatus for testing the high-density semiconductor device with a higher accuracy, higher efficiency and reduced cost.
In order to achieve the above objects according to the present invention, a method of testing semiconductor devices includes an adhering step, a position correcting step, and an electrical test step. The adhering step includes adhering either a semiconductor device collective body or a plurality of individual semiconductor devices onto an adhesive tape provided on a tape-holding member, the semiconductor device collective body being constructed by a plurality of semiconductor devices integrated together. The position correcting step includes positioning semiconductor devices by mounting the tape-holding member on a position correction unit and, using an image processing technique, implementing position recognition and position correction of the semiconductor devices adhered on the adhesive tape. The electrical test step includes implementing an electrical characteristic test on the semiconductor devices positioned in the position correction step by connecting the semiconductor devices to a testing contactor.
With the method described above, it is possible to implement position recognition and position correction on each one of the semiconductor devices, even if the semiconductor devices have different positions on the adhesive tape.
Also, by using the image processing technique, a comparatively accurate position recognition and position correction is achieved. Further, even if there is a change in the size of the semiconductor devices, the test can be implemented without changing the structure of the testing apparatus.
Also, the electrical test process is implemented on the accurately positioned semiconductor devices. Thus, high-density semiconductor devices can be accurately and positively connected to the testing contactor. Thus, it is possible to improve the reliability of the electrical characteristic test.
In order to achieve the above objects, there is also provided an apparatus for testing a plurality of individualized semiconductor devices adhered on an adhesive tape provided on a tape-holding member. The apparatus includes:
a position correction unit for implementing position recognition and position correction on each one of the plurality of semiconductor devices using an image processing technique; and
an electrical characteristic testing unit for implementing an electrical characteristic test on the semiconductor devices, the electrical characteristic testing unit being provided with a testing contactor to be connected to electrodes formed on the semiconductor devices and the semiconductor devices having been positioned corrected in the position correction unit being connected.
Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.
REFERENCES:
patent: 4046985 (1977-09-01), Gates
patent: 5899729 (1999-05-01), Lee
patent: 5999268 (1999-12-01), Yonezawa et al.
patent: 6174789 (2001-01-01), Tsukada
Akasaki Yuji
Itasaka Kenji
Kamifukumoto Terumi
Ooyama Nobuo
Armstrong Westerman & Hattori, LLP
Kerveros James
Le N.
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