Method and apparatus for testing of electronic assemblies

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G01R 3128

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056423632

ABSTRACT:
A testing method and apparatus for testing complex board assemblies by configuring the data paths on the multiple boards into one larger virtual data path. The system uses reconfiguration commands and serial data streams to test the virtual data path, and reconfigures the virtual data path as sections are tested to shorten the virtual data path after each data stream is verified, thereby reducing test time and cost.

REFERENCES:
patent: 4868414 (1989-09-01), Kanazawa
patent: 4876501 (1989-10-01), Ardini et al.
patent: 4914379 (1990-04-01), Maeno
patent: 5054024 (1991-10-01), Whetsel
IEEE Standard Test Access Port and Boundary-Scan Architechture (IEEE Std. 1149.1-1990) Pub. by Institute of Electrical & Electronic Engineers, New York (May 1990).

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