Method and apparatus for testing integrated circuits

Classifying – separating – and assorting solids – Sorting special items – and certain methods and apparatus for... – Condition responsive means controls separating means

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C209S911000, C324S1540PB

Reissue Patent

active

RE038894

ABSTRACT:
There is an IC (integrated circuit) testing device11that receives singulated ICs from a singulation station's bottom table44, where an IC15has slid down onto loading ramp or track16. The IC will slide into test station18, where stop pin22has been inserted to stop the IC in DUT (device under test) station20. In the DUT station, the IC is securely held in position by an extractor bar26, insertion bar28, and a part guide24. Thereby, test cite station18will move downward and insert IC15into testing socket30. After testing the IC, testing station18returns upward with IC in the same secured position. Pin22will be removed to allow the IC to slide into part holding station31. If the IC was not defective, pin32will be removed to allow the IC to slide onto track36of the IC separator station34. While the test cite station18is in the up position a second IC is slid along track16and loaded into DUT cite20being readied for the next test cycle. However, if the first IC was found to be defective, pin32will be positioned so as to stop the IC from sliding onto track36. Thereby, the test cite18will proceed to the down position to test the second IC, and simultaneously pin32will be removed to now allow the defective IC to slide onto track38. The second IC has now completed its testing and is ready to proceed to the remainder of the cycle.

REFERENCES:
patent: 4691831 (1987-09-01), Suzuki et al.
patent: 4733459 (1988-03-01), Tateno
patent: 4805779 (1989-02-01), Heigl
patent: 4976356 (1990-12-01), Mizuno et al.
patent: 5230432 (1993-07-01), Sugai
patent: 5261775 (1993-11-01), Kobayashi
patent: 55-27955 (1980-02-01), None
Welcon Sockets and Connectors, Wells Electronics, Inc. 1701 S. Main St., South Bend, Ind., 46613 1991.
“Automatic Progressive Tooling System,” AP50, 12 pages.
“The Matrix System™, Trim-Form Equipment for Todays Advanced Scale Packaging,” Precision Technologies, Inc., 2 pages., 1991.

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