Method and apparatus for testing frequency symmetry of digital s

Details Method and apparatus for testing frequency symmetry of digital s Method and apparatus for testing frequency symmetry of digital s

1993-03-31

1995-07-25

Chin, Stephen

Pulse or digital communications

Testing

375362, 4551922, 327 41, 327 40, H04B 346, H04B 1700

Patent

active

054369274

ABSTRACT:
A first and a second input generating circuits, a first and a second set of counters, and a first and a second comparison circuits are provided to test whether the frequencies of a first and a second periodic digital signal are symmetric. The first and second input generating circuits generate enable inputs for the first and second sets of counters using the first and second digital signals respectively. The first and second sets of counters count the first and second digital signals while the enable inputs are provided. The first comparison circuit monitors the first set of counters, and stops both input generating circuits from providing further enable inputs to both sets of counters, after the first set of counters reaches a predetermined level, thereby stopping both sets of counters from further counting. The second comparison circuit monitors the second set of counters, and issues a control signal indicating the first and second digital signals are symmetric to each other in frequency, if the second set of counters also stops substantially at the predetermined level, i.e. within an acceptable threshold.

REFERENCES:
patent: 3688201 (1972-08-01), Pommerening
patent: 3987365 (1976-10-01), Okada et al.
patent: 4278898 (1981-07-01), Rhode
patent: 4484291 (1984-11-01), Schlosser
patent: 5180935 (1993-01-01), Abdi et al.

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