Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Utility Patent
1996-09-30
2001-01-02
Nguyen, Vinh P. (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S096000
Utility Patent
active
06169408
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to integrated circuits, and more generally to a method and apparatus for testing integrated circuits.
BACKGROUND OF THE INVENTION
It is highly desirable to monitor the internal electrical characteristics of packaged integrated circuits (ICs) to ensure proper functionality, and to identify internal manufacturing or design defects. One technique used to monitor the electrical characteristics of ICs is to create an optical beam induced current (OBIC) within a packaged IC by irradiating a point within it with a constant-energy laser. The small OBIC perturbations caused within the IC by the laser are then monitored on an external pin of the IC. In one prior art technique, OBIC is used to monitor the IC while it is in a static mode (the circuit nodes within the IC are not transitioning and a clock signal is not being dynamically provided to the IC). More specifically, the internal clock of the IC is stopped while it is scanned with the laser so that the extreme noise introduced by the switching of the IC's clock is avoided. Typical clock noise and VDD/ground rail currents may be on the order of several hundred milliamperes with fluctuations of several hundered milliamperes. The OBIC signal induced by the laser is typically 1 microampere or less, and thus it is easily lost in the noise which is also present at the external pin of the IC. A critical limitation of the static OBIC technique is that it is not applicable to a class of non-static ICs which require the clock to be applied continuously for the IC to remain in a functional state. The static technique of OBIC measurement also has limited utility because the integrated circuit is only observed while in a single static state, whereas a typical IC test sequence involves hundreds of sequential states that must be monitored to diagnose the IC. In addition, static OBIC techniques do not enable measurement of transient information. Therefore, by not being able to view dynamic operations, a great deal of diagnostic information is lost when using the static OBIC technique.
In a related technique, the IC is run at a higher frequency of operation without irradiation of the laser up to a certain point in time. At the certain point in time, the internal clock of the integrated circuit is momentarily stopped so that a single measurement of a given circuit node within the IC can be made using the constant-energy laser. Thus, this technique is a pseudo-dynamic technique but still only measures static conditions after dynamic operation. This pseudo-dynamic technique is subject to the same limitations of a static technique described above.
A third technique employs a single sample, DC OBIC subtraction circuit to demonstrate dynamic measurements at slow clock speeds. This technique is inherently sensitive to IDD transients and overall test system noise especially at higher IC operating frequencies, and thus, is limited to frequencies of roughly 100 hertz (Hz) or lower. Given that nearly all modern ICs operate at speeds in excess of 10 MHz, testing at 100 Hz is disadvantageous. This 100 Hz test is analogous to testing a 200 mph stock car at 0.002 mph to see if the car runs properly. Clearly, a higher frequency test methodology would be advantageous.
Furthermore, this technique is also current limited whereby only integrated circuits which draw less than about two milliamperes can be tested. Almost all high-powered modern integrated circuits now draw in excess of two milliamperes, thereby rendering this technique much less valuable.
Accordingly, a need exists for a method of monitoring the internal electrical characteristics of an integrated circuit where (1) higher test frequencies are obtained; (2) better noise rejection for measuring OBIC signal is achieved; (3) higher current and higher powered ICs (on the order of hundreds of milliamperes) can be tested in an OBIC manner; (4) dynamic logic transitions between logic low and logic high can be observed rather than static logic states; and (5) analog voltage variations can be detected rather than just logic 1 or logic 0 static digital states.
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Sawyer, David E. et al., Laser Scanning of MOS IC's Reveals Internal Logic States Nondestructively, Proceedings of the IEEE, Mar. 1976, pp. 393-394.
Pronobis, Mark T. et al., “Laser Die Proving for Complex CMOS,” from Conference Proceedings, International Symposium for Testing and Failure Analysis (ISTFA), 1982, pp. 178-181. (Month Unavailable).
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Asquith John E.
Erington Kent B.
Kantor Kenneth J.
Motorola Inc.
Nguyen Vinh P.
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