Method and apparatus for testing an integrated circuit

Details Method and apparatus for testing an integrated circuit Method and apparatus for testing an integrated circuit

1980-04-21

1983-05-24

Strecker, Gerard R.

Electricity: measuring and testing

Plural, automatically sequential tests

G01R 1512

Patent

active

043852750

ABSTRACT:
In order to set the circuit to be tested to a test mode, at least one output is led out by an output stage, and the input and output of the output stage internally leads to an exclusive-OR gate. As long as the output has a comparatively high-ohmic termination, as is the case during the normal mode of operation, the exclusive-OR gate will carry the same signal for both signal conditions of the output. For the purpose of testing a complementary pulse pattern is applied to the output, so that the exclusive-OR gate supplies an opposite signal, which establishes the test mode. The output of the exclusive-OR gate may lead to a bistable multivibrator, so that for establishing the test mode only a single complementary signal is required.

REFERENCES:
patent: 4176258 (1979-11-01), Jackson

Affiliated with

Also associated with

Rating

Method and apparatus for testing an integrated circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for testing an integrated circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for testing an integrated circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2147877