Method and apparatus for testing a system on a chip (SOC)...

Details Method and apparatus for testing a system on a chip (SOC)... Method and apparatus for testing a system on a chip (SOC)...

2006-06-13

2006-06-13

Rodriguez, Paul L. (Department: 2123)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

C703S021000, C703S019000

Reexamination Certificate

active

07062423

ABSTRACT:
Apparatus for testing a system on a chip (SOC) comprises a first SOC including a first hard disk controller and a first read channel. A second SOC comprises a second hard disk controller and a second read channel. An arbitrary waveform generator (AWG) generates a timing signal. An adder is provided in communication with the arbitrary waveform generator. The first SOC differentiates the timing signal received from the arbitrary waveform generator and generates a write signal in synchronization with the timing signal. The adder adds the write signal from the first SOC and the timing signal to output a combined signal having a timing signal component and a write signal component. The second SOC differentiates the timing signal component which simulates a servo signal and the write signal component simulates a signal being accessed by a read channel.

REFERENCES:
patent: 5610530 (1997-03-01), Whetsel
patent: 5832418 (1998-11-01), Meyer
patent: 5867033 (1999-02-01), Sporck et al.
patent: 6075663 (2000-06-01), Chae
patent: 6076180 (2000-06-01), Meyer
patent: 6169413 (2001-01-01), Pack et al.
patent: 6498998 (2002-12-01), Furukawa
patent: 6557128 (2003-04-01), Turnquist
patent: 6697976 (2004-02-01), Satoh et al.

Affiliated with

Also associated with

Rating

Method and apparatus for testing a system on a chip (SOC)... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for testing a system on a chip (SOC)..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for testing a system on a chip (SOC)... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3690456