Method and apparatus for testing a memory

Details Method and apparatus for testing a memory Method and apparatus for testing a memory

1989-11-21

1992-04-28

Beausoliel, Robert W.

Excavating

371 225, 365201, G06F 1100

Patent

active

051093820

ABSTRACT:
Method and apparatus for testing a memory mounted on an information processing system which includes a processor and at least one memory device. The memory device has a built-in memory test capability. In testing the memory mounted on the system, a test using the built-in test capability is combined with an additional test using a normal write/read operation of the memory performed by the processor unit. While the test using the built-in test capability is performed over the entire memory addresses, the additional test is performed with limited addresses.

REFERENCES:
patent: 4740971 (1988-04-01), Tam
patent: 4897817 (1990-01-01), Katanosaka
patent: 4903266 (1990-02-01), Hack
patent: 4905142 (1990-02-01), Matsubara
patent: 4951254 (1990-08-01), Ontrop
patent: 4956818 (1990-09-01), Hatayama

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